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Searched refs:native_mode (Results 1 – 19 of 19) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Damdgpu_encoders.c151 struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode; in amdgpu_panel_mode_fixup() local
152 unsigned hblank = native_mode->htotal - native_mode->hdisplay; in amdgpu_panel_mode_fixup()
153 unsigned vblank = native_mode->vtotal - native_mode->vdisplay; in amdgpu_panel_mode_fixup()
154 unsigned hover = native_mode->hsync_start - native_mode->hdisplay; in amdgpu_panel_mode_fixup()
155 unsigned vover = native_mode->vsync_start - native_mode->vdisplay; in amdgpu_panel_mode_fixup()
156 unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start; in amdgpu_panel_mode_fixup()
157 unsigned vsync_width = native_mode->vsync_end - native_mode->vsync_start; in amdgpu_panel_mode_fixup()
159 adjusted_mode->clock = native_mode->clock; in amdgpu_panel_mode_fixup()
160 adjusted_mode->flags = native_mode->flags; in amdgpu_panel_mode_fixup()
162 adjusted_mode->hdisplay = native_mode->hdisplay; in amdgpu_panel_mode_fixup()
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Damdgpu_connectors.c389 amdgpu_encoder->native_mode = *preferred_mode; in amdgpu_get_native_mode()
391 amdgpu_encoder->native_mode.clock = 0; in amdgpu_get_native_mode()
401 struct drm_display_mode *native_mode = &amdgpu_encoder->native_mode; in amdgpu_connector_lcd_native_mode() local
403 if (native_mode->hdisplay != 0 && in amdgpu_connector_lcd_native_mode()
404 native_mode->vdisplay != 0 && in amdgpu_connector_lcd_native_mode()
405 native_mode->clock != 0) { in amdgpu_connector_lcd_native_mode()
406 mode = drm_mode_duplicate(dev, native_mode); in amdgpu_connector_lcd_native_mode()
414 } else if (native_mode->hdisplay != 0 && in amdgpu_connector_lcd_native_mode()
415 native_mode->vdisplay != 0) { in amdgpu_connector_lcd_native_mode()
423 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); in amdgpu_connector_lcd_native_mode()
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Datombios_encoders.c1933 lvds->native_mode.clock = in amdgpu_atombios_encoder_get_lcd_info()
1935 lvds->native_mode.hdisplay = in amdgpu_atombios_encoder_get_lcd_info()
1937 lvds->native_mode.vdisplay = in amdgpu_atombios_encoder_get_lcd_info()
1939 lvds->native_mode.htotal = lvds->native_mode.hdisplay + in amdgpu_atombios_encoder_get_lcd_info()
1941 lvds->native_mode.hsync_start = lvds->native_mode.hdisplay + in amdgpu_atombios_encoder_get_lcd_info()
1943 lvds->native_mode.hsync_end = lvds->native_mode.hsync_start + in amdgpu_atombios_encoder_get_lcd_info()
1945 lvds->native_mode.vtotal = lvds->native_mode.vdisplay + in amdgpu_atombios_encoder_get_lcd_info()
1947 lvds->native_mode.vsync_start = lvds->native_mode.vdisplay + in amdgpu_atombios_encoder_get_lcd_info()
1949 lvds->native_mode.vsync_end = lvds->native_mode.vsync_start + in amdgpu_atombios_encoder_get_lcd_info()
1957 lvds->native_mode.flags |= DRM_MODE_FLAG_NVSYNC; in amdgpu_atombios_encoder_get_lcd_info()
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Damdgpu_display.c714 else if (mode->hdisplay < amdgpu_encoder->native_mode.hdisplay || in amdgpu_crtc_scaling_mode_fixup()
715 mode->vdisplay < amdgpu_encoder->native_mode.vdisplay) in amdgpu_crtc_scaling_mode_fixup()
720 memcpy(&amdgpu_crtc->native_mode, in amdgpu_crtc_scaling_mode_fixup()
721 &amdgpu_encoder->native_mode, in amdgpu_crtc_scaling_mode_fixup()
724 dst_v = amdgpu_crtc->native_mode.vdisplay; in amdgpu_crtc_scaling_mode_fixup()
726 dst_h = amdgpu_crtc->native_mode.hdisplay; in amdgpu_crtc_scaling_mode_fixup()
Damdgpu_mode.h389 struct drm_display_mode native_mode; member
424 struct drm_display_mode native_mode; member
444 struct drm_display_mode native_mode; member
/drivers/gpu/drm/radeon/
Dradeon_encoders.c325 struct drm_display_mode *native_mode = &radeon_encoder->native_mode; in radeon_panel_mode_fixup() local
326 unsigned hblank = native_mode->htotal - native_mode->hdisplay; in radeon_panel_mode_fixup()
327 unsigned vblank = native_mode->vtotal - native_mode->vdisplay; in radeon_panel_mode_fixup()
328 unsigned hover = native_mode->hsync_start - native_mode->hdisplay; in radeon_panel_mode_fixup()
329 unsigned vover = native_mode->vsync_start - native_mode->vdisplay; in radeon_panel_mode_fixup()
330 unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start; in radeon_panel_mode_fixup()
331 unsigned vsync_width = native_mode->vsync_end - native_mode->vsync_start; in radeon_panel_mode_fixup()
333 adjusted_mode->clock = native_mode->clock; in radeon_panel_mode_fixup()
334 adjusted_mode->flags = native_mode->flags; in radeon_panel_mode_fixup()
337 adjusted_mode->hdisplay = native_mode->hdisplay; in radeon_panel_mode_fixup()
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Dradeon_connectors.c413 radeon_encoder->native_mode = *preferred_mode; in radeon_get_native_mode()
415 radeon_encoder->native_mode.clock = 0; in radeon_get_native_mode()
480 struct drm_display_mode *native_mode = &radeon_encoder->native_mode; in radeon_fp_native_mode() local
482 if (native_mode->hdisplay != 0 && in radeon_fp_native_mode()
483 native_mode->vdisplay != 0 && in radeon_fp_native_mode()
484 native_mode->clock != 0) { in radeon_fp_native_mode()
485 mode = drm_mode_duplicate(dev, native_mode); in radeon_fp_native_mode()
490 } else if (native_mode->hdisplay != 0 && in radeon_fp_native_mode()
491 native_mode->vdisplay != 0) { in radeon_fp_native_mode()
499 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); in radeon_fp_native_mode()
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Dradeon_legacy_crtc.c62 struct drm_display_mode *native_mode = &radeon_crtc->native_mode; in radeon_legacy_rmx_mode_set() local
109 if (native_mode->hdisplay == 0 || in radeon_legacy_rmx_mode_set()
110 native_mode->vdisplay == 0) { in radeon_legacy_rmx_mode_set()
114 if (xres > native_mode->hdisplay) in radeon_legacy_rmx_mode_set()
115 xres = native_mode->hdisplay; in radeon_legacy_rmx_mode_set()
116 if (yres > native_mode->vdisplay) in radeon_legacy_rmx_mode_set()
117 yres = native_mode->vdisplay; in radeon_legacy_rmx_mode_set()
119 if (xres == native_mode->hdisplay) in radeon_legacy_rmx_mode_set()
121 if (yres == native_mode->vdisplay) in radeon_legacy_rmx_mode_set()
133 / native_mode->hdisplay + 1; in radeon_legacy_rmx_mode_set()
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Dradeon_combios.c1126 lvds->native_mode.vdisplay = in radeon_legacy_get_lvds_info_from_regs()
1130 lvds->native_mode.vdisplay = in radeon_legacy_get_lvds_info_from_regs()
1134 lvds->native_mode.hdisplay = in radeon_legacy_get_lvds_info_from_regs()
1138 lvds->native_mode.hdisplay = in radeon_legacy_get_lvds_info_from_regs()
1141 if ((lvds->native_mode.hdisplay < 640) || in radeon_legacy_get_lvds_info_from_regs()
1142 (lvds->native_mode.vdisplay < 480)) { in radeon_legacy_get_lvds_info_from_regs()
1143 lvds->native_mode.hdisplay = 640; in radeon_legacy_get_lvds_info_from_regs()
1144 lvds->native_mode.vdisplay = 480; in radeon_legacy_get_lvds_info_from_regs()
1164 DRM_INFO("Panel Size %dx%d\n", lvds->native_mode.hdisplay, in radeon_legacy_get_lvds_info_from_regs()
1165 lvds->native_mode.vdisplay); in radeon_legacy_get_lvds_info_from_regs()
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Dradeon_atombios.c1649 lvds->native_mode.clock = in radeon_atombios_get_lvds_info()
1651 lvds->native_mode.hdisplay = in radeon_atombios_get_lvds_info()
1653 lvds->native_mode.vdisplay = in radeon_atombios_get_lvds_info()
1655 lvds->native_mode.htotal = lvds->native_mode.hdisplay + in radeon_atombios_get_lvds_info()
1657 lvds->native_mode.hsync_start = lvds->native_mode.hdisplay + in radeon_atombios_get_lvds_info()
1659 lvds->native_mode.hsync_end = lvds->native_mode.hsync_start + in radeon_atombios_get_lvds_info()
1661 lvds->native_mode.vtotal = lvds->native_mode.vdisplay + in radeon_atombios_get_lvds_info()
1663 lvds->native_mode.vsync_start = lvds->native_mode.vdisplay + in radeon_atombios_get_lvds_info()
1665 lvds->native_mode.vsync_end = lvds->native_mode.vsync_start + in radeon_atombios_get_lvds_info()
1673 lvds->native_mode.flags |= DRM_MODE_FLAG_NVSYNC; in radeon_atombios_get_lvds_info()
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Dradeon_mode.h351 struct drm_display_mode native_mode; member
393 struct drm_display_mode native_mode; member
437 struct drm_display_mode native_mode; member
474 struct drm_display_mode native_mode; member
Dradeon_display.c1762 else if (mode->hdisplay < radeon_encoder->native_mode.hdisplay || in radeon_crtc_scaling_mode_fixup()
1763 mode->vdisplay < radeon_encoder->native_mode.vdisplay) in radeon_crtc_scaling_mode_fixup()
1768 memcpy(&radeon_crtc->native_mode, in radeon_crtc_scaling_mode_fixup()
1769 &radeon_encoder->native_mode, in radeon_crtc_scaling_mode_fixup()
1772 dst_v = radeon_crtc->native_mode.vdisplay; in radeon_crtc_scaling_mode_fixup()
1774 dst_h = radeon_crtc->native_mode.hdisplay; in radeon_crtc_scaling_mode_fixup()
/drivers/video/
Dof_display_timing.c140 struct device_node *native_mode; in of_get_display_timings() local
174 native_mode = entry; in of_get_display_timings()
192 disp->native_mode = 0; in of_get_display_timings()
217 if (native_mode == entry) in of_get_display_timings()
218 disp->native_mode = disp->num_timings; in of_get_display_timings()
228 of_node_put(native_mode); in of_get_display_timings()
232 disp->native_mode + 1); in of_get_display_timings()
237 of_node_put(native_mode); in of_get_display_timings()
Dof_videomode.c44 index = disp->native_mode; in of_get_videomode()
/drivers/gpu/drm/nouveau/
Dnouveau_connector.c677 struct drm_display_mode *native = nv_connector->native_mode, *m; in nouveau_connector_scaler_modes_add()
713 struct drm_display_mode *mode = nv_connector->native_mode; in nouveau_connector_detect_depth()
767 if (nv_connector->native_mode) { in nouveau_connector_get_modes()
768 drm_mode_destroy(dev, nv_connector->native_mode); in nouveau_connector_get_modes()
769 nv_connector->native_mode = NULL; in nouveau_connector_get_modes()
781 nv_connector->native_mode = drm_mode_duplicate(dev, &mode); in nouveau_connector_get_modes()
794 if (!nv_connector->native_mode) in nouveau_connector_get_modes()
795 nv_connector->native_mode = in nouveau_connector_get_modes()
797 if (ret == 0 && nv_connector->native_mode) { in nouveau_connector_get_modes()
800 mode = drm_mode_duplicate(dev, nv_connector->native_mode); in nouveau_connector_get_modes()
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Dnouveau_connector.h82 struct drm_display_mode *native_mode; member
Dnv50_display.c754 if (nv_connector && nv_connector->native_mode) { in nv50_crtc_set_scale()
761 omode = nv_connector->native_mode; in nv50_crtc_set_scale()
1517 if (nv_connector && nv_connector->native_mode) { in nv50_encoder_mode_fixup()
1534 drm_mode_copy(adjusted_mode, nv_connector->native_mode); in nv50_encoder_mode_fixup()
/drivers/gpu/drm/nouveau/dispnv04/
Ddfp.c189 if (!nv_connector->native_mode || in nv04_dfp_mode_fixup()
191 mode->hdisplay > nv_connector->native_mode->hdisplay || in nv04_dfp_mode_fixup()
192 mode->vdisplay > nv_connector->native_mode->vdisplay) { in nv04_dfp_mode_fixup()
196 nv_encoder->mode = *nv_connector->native_mode; in nv04_dfp_mode_fixup()
197 adjusted_mode->clock = nv_connector->native_mode->clock; in nv04_dfp_mode_fixup()
595 if (connector && connector->native_mode) in nv04_dfp_restore()
598 connector->native_mode->clock); in nv04_dfp_restore()
/drivers/gpu/drm/tilcdc/
Dtilcdc_panel.c194 if (timings->native_mode == i) in panel_connector_get_modes()