Home
last modified time | relevance | path

Searched refs:nshift (Results 1 – 7 of 7) sorted by relevance

/drivers/clk/
Dclk-fractional-divider.c43 n = (val & fd->nmask) >> fd->nshift; in clk_fd_recalc_rate()
103 val |= (m << fd->mshift) | (n << fd->nshift); in clk_fd_set_rate()
123 void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth, in clk_register_fractional_divider() argument
144 fd->nshift = nshift; in clk_register_fractional_divider()
146 fd->nmask = GENMASK(nwidth - 1, 0) << nshift; in clk_register_fractional_divider()
/drivers/net/ethernet/tehuti/
Dtehuti.h129 #define GET_BITS_SHIFT(x, nbits, nshift) (((x)>>nshift)&BITS_MASK(nbits)) argument
130 #define BITS_SHIFT_MASK(nbits, nshift) (BITS_MASK(nbits)<<nshift) argument
131 #define BITS_SHIFT_VAL(x, nbits, nshift) (((x)&BITS_MASK(nbits))<<nshift) argument
132 #define BITS_SHIFT_CLEAR(x, nbits, nshift) \ argument
133 ((x)&(~BITS_SHIFT_MASK(nbits, nshift)))
/drivers/clk/sunxi/
Dclk-sunxi.c612 .nshift = 8,
623 .nshift = 8,
633 .nshift = 8,
645 .nshift = 8,
652 .nshift = 8,
Dclk-factors.c58 n = FACTOR_GET(config->nshift, config->nwidth, reg); in clk_factors_recalc_rate()
138 reg = FACTOR_SET(config->nshift, config->nwidth, reg, n); in clk_factors_set_rate()
Dclk-factors.h11 u8 nshift; member
Dclk-sun9i-core.c77 .nshift = 8,
/drivers/clk/rockchip/
Dclk.c147 div->nshift = 0; in rockchip_clk_register_frac_branch()
149 div->nmask = GENMASK(div->nwidth - 1, 0) << div->nshift; in rockchip_clk_register_frac_branch()