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Searched refs:outreg (Results 1 – 11 of 11) sorted by relevance

/drivers/video/fbdev/mb862xx/
Dmb862xxfbdrv.c102 outreg(disp, GC_L0PAL0 + (regno * 4), val); in mb862xxfb_setcolreg()
219 outreg(disp, GC_DCM1, reg); in mb862xxfb_set_par()
226 outreg(disp, GC_DCM1, reg); in mb862xxfb_set_par()
234 outreg(disp, GC_L0M, reg); in mb862xxfb_set_par()
238 outreg(disp, GC_L0EM, reg | GC_L0EM_L0EC_24); in mb862xxfb_set_par()
240 outreg(disp, GC_WY_WX, 0); in mb862xxfb_set_par()
242 outreg(disp, GC_WH_WW, reg); in mb862xxfb_set_par()
243 outreg(disp, GC_L0OA0, 0); in mb862xxfb_set_par()
244 outreg(disp, GC_L0DA0, 0); in mb862xxfb_set_par()
245 outreg(disp, GC_L0DY_L0DX, 0); in mb862xxfb_set_par()
[all …]
Dmb862xx-i2c.c40 outreg(i2c, GC_I2C_DAR, addr); in mb862xx_i2c_do_address()
41 outreg(i2c, GC_I2C_CCR, I2C_CLOCK_AND_ENABLE); in mb862xx_i2c_do_address()
42 outreg(i2c, GC_I2C_BCR, par->i2c_rs ? I2C_REPEATED_START : I2C_START); in mb862xx_i2c_do_address()
53 outreg(i2c, GC_I2C_DAR, byte); in mb862xx_i2c_write_byte()
54 outreg(i2c, GC_I2C_BCR, I2C_START); in mb862xx_i2c_write_byte()
64 outreg(i2c, GC_I2C_BCR, I2C_START | (last ? 0 : I2C_ACK)); in mb862xx_i2c_read_byte()
75 outreg(i2c, GC_I2C_BCR, I2C_STOP); in mb862xx_i2c_stop()
76 outreg(i2c, GC_I2C_CCR, I2C_DISABLE); in mb862xx_i2c_stop()
Dmb862xxfb_accel.c37 outreg(geo, GDC_GEO_REG_INPUT_FIFO, data[total]); in mb862xxfb_write_fifo()
319 outreg(disp, GC_L0EM, 3); in mb862xxfb_init_accel()
324 outreg(draw, GDC_REG_DRAW_BASE, 0); in mb862xxfb_init_accel()
325 outreg(draw, GDC_REG_MODE_MISC, 0x8000); in mb862xxfb_init_accel()
326 outreg(draw, GDC_REG_X_RESOLUTION, xres); in mb862xxfb_init_accel()
Dmb862xxfb.h114 #define outreg(type, off, val) \ macro
/drivers/media/dvb-frontends/
Ddib7000p.c171 u16 outreg, fifo_threshold, smo_mode; in dib7000p_set_output_mode() local
173 outreg = 0; in dib7000p_set_output_mode()
181 outreg = (1 << 10); /* 0x0400 */ in dib7000p_set_output_mode()
184 outreg = (1 << 10) | (1 << 6); /* 0x0440 */ in dib7000p_set_output_mode()
187 outreg = (1 << 10) | (2 << 6) | (0 << 1); /* 0x0480 */ in dib7000p_set_output_mode()
191 outreg = (1 << 10) | (4 << 6); /* 0x0500 */ in dib7000p_set_output_mode()
193 outreg = (1 << 11); in dib7000p_set_output_mode()
198 outreg = (1 << 10) | (5 << 6); in dib7000p_set_output_mode()
201 outreg = (1 << 10) | (3 << 6); in dib7000p_set_output_mode()
204 outreg = 0; in dib7000p_set_output_mode()
[all …]
Ddib7000m.c150 u16 outreg, fifo_threshold, smo_mode, in dib7000m_set_output_mode() local
153 outreg = 0; in dib7000m_set_output_mode()
161 outreg = (1 << 10); /* 0x0400 */ in dib7000m_set_output_mode()
164 outreg = (1 << 10) | (1 << 6); /* 0x0440 */ in dib7000m_set_output_mode()
167 outreg = (1 << 10) | (2 << 6) | (0 << 1); /* 0x0482 */ in dib7000m_set_output_mode()
171 outreg = (1 << 10) | (4 << 6); /* 0x0500 */ in dib7000m_set_output_mode()
178 outreg = (1 << 10) | (5 << 6); in dib7000m_set_output_mode()
181 outreg = 0; in dib7000m_set_output_mode()
193 ret |= dib7000m_write_word(state, 1795, outreg); in dib7000m_set_output_mode()
Ddib8000.c404 u16 outreg, fifo_threshold, smo_mode, sram = 0x0205; /* by default SDRAM deintlv is enabled */ in dib8000_set_output_mode() local
407 outreg = 0; in dib8000_set_output_mode()
416 outreg = (1 << 10); /* 0x0400 */ in dib8000_set_output_mode()
419 outreg = (1 << 10) | (1 << 6); /* 0x0440 */ in dib8000_set_output_mode()
422 outreg = (1 << 10) | (2 << 6) | (0 << 1); /* 0x0482 */ in dib8000_set_output_mode()
426 outreg = (1 << 10) | (4 << 6); /* 0x0500 */ in dib8000_set_output_mode()
434 outreg = (1 << 10) | (5 << 6); in dib8000_set_output_mode()
437 outreg = 0; in dib8000_set_output_mode()
441 outreg = (1 << 10) | (3 << 6); in dib8000_set_output_mode()
456 dib8000_write_word(state, 1286, outreg); in dib8000_set_output_mode()
[all …]
Ddib3000mc.c157 u16 outreg = 0; in dib3000mc_set_output_mode() local
205 outreg = dib3000mc_read_word(state, 244) & 0x07FF; in dib3000mc_set_output_mode()
206 outreg |= (outmode << 11); in dib3000mc_set_output_mode()
207 ret |= dib3000mc_write_word(state, 244, outreg); in dib3000mc_set_output_mode()
Ddib9000.c1535 u16 outreg, smo_mode; in dib9000_fw_set_output_mode() local
1541 outreg = (1 << 10); /* 0x0400 */ in dib9000_fw_set_output_mode()
1544 outreg = (1 << 10) | (1 << 6); /* 0x0440 */ in dib9000_fw_set_output_mode()
1547 outreg = (1 << 10) | (2 << 6) | (0 << 1); /* 0x0482 */ in dib9000_fw_set_output_mode()
1550 outreg = (1 << 10) | (4 << 6); /* 0x0500 */ in dib9000_fw_set_output_mode()
1553 outreg = (1 << 10) | (5 << 6); in dib9000_fw_set_output_mode()
1556 outreg = 0; in dib9000_fw_set_output_mode()
1563 dib9000_write_word(state, 1795, outreg); in dib9000_fw_set_output_mode()
1577 outreg = to_fw_output_mode(mode); in dib9000_fw_set_output_mode()
1578 return dib9000_mbx_send(state, OUT_MSG_SET_OUTPUT_MODE, &outreg, 1); in dib9000_fw_set_output_mode()
/drivers/watchdog/
Deurotechwdt.c445 goto outreg; in eurwdt_init()
466 outreg: in eurwdt_init()
Dwdt.c617 goto outreg; in wdt_init()
656 outreg: in wdt_init()