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Searched refs:pixel_size (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/i915/
Dintel_sprite.c195 int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0); in skl_update_plane() local
216 pixel_size, true, in skl_update_plane()
359 int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0); in vlv_update_plane() local
423 linear_offset = y * fb->pitches[0] + x * pixel_size; in vlv_update_plane()
427 pixel_size, in vlv_update_plane()
436 linear_offset += src_h * fb->pitches[0] + src_w * pixel_size; in vlv_update_plane()
498 int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0); in ivb_update_plane() local
544 intel_update_sprite_watermarks(plane, crtc, src_w, src_h, pixel_size, in ivb_update_plane()
557 linear_offset = y * fb->pitches[0] + x * pixel_size; in ivb_update_plane()
561 pixel_size, fb->pitches[0]); in ivb_update_plane()
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Dintel_pm.c566 int pixel_size, in intel_calculate_wm() argument
577 entries_required = ((clock_in_khz / 1000) * pixel_size * latency_ns) / in intel_calculate_wm()
641 int pixel_size = crtc->primary->state->fb->bits_per_pixel / 8; in pineview_update_wm() local
647 pixel_size, latency->display_sr); in pineview_update_wm()
657 pixel_size, latency->cursor_sr); in pineview_update_wm()
666 pixel_size, latency->display_hpll_disable); in pineview_update_wm()
675 pixel_size, latency->cursor_hpll_disable); in pineview_update_wm()
699 int htotal, hdisplay, clock, pixel_size; in g4x_compute_wm0() local
714 pixel_size = crtc->primary->state->fb->bits_per_pixel / 8; in g4x_compute_wm0()
717 entries = ((clock * pixel_size / 1000) * display_latency_ns) / 1000; in g4x_compute_wm0()
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Dintel_drv.h1401 int pixel_size,
Dintel_display.c2699 int pixel_size; in i9xx_update_primary_plane() local
2715 pixel_size = drm_format_plane_cpp(fb->pixel_format, 0); in i9xx_update_primary_plane()
2773 linear_offset = y * fb->pitches[0] + x * pixel_size; in i9xx_update_primary_plane()
2779 pixel_size, in i9xx_update_primary_plane()
2796 (intel_crtc->config->pipe_src_w - 1) * pixel_size; in i9xx_update_primary_plane()
2829 int pixel_size; in ironlake_update_primary_plane() local
2842 pixel_size = drm_format_plane_cpp(fb->pixel_format, 0); in ironlake_update_primary_plane()
2880 linear_offset = y * fb->pitches[0] + x * pixel_size; in ironlake_update_primary_plane()
2884 pixel_size, in ironlake_update_primary_plane()
2898 (intel_crtc->config->pipe_src_w - 1) * pixel_size; in ironlake_update_primary_plane()
Di915_drv.h638 int pixel_size, bool enable, bool scaled);
/drivers/video/fbdev/omap2/dss/
Drfbi.c117 int pixel_size; member
768 return rfbi_configure_bus(dssdev->phy.rfbi.channel, rfbi.pixel_size, in rfbi_configure()
784 static void rfbi_set_pixel_size(struct omap_dss_device *dssdev, int pixel_size) in rfbi_set_pixel_size() argument
786 rfbi.pixel_size = pixel_size; in rfbi_set_pixel_size()
851 mgr_config.video_port_width = rfbi.pixel_size; in rfbi_config_lcd_manager()
901 rfbi_configure_bus(dssdev->phy.rfbi.channel, rfbi.pixel_size, in rfbi_display_enable()
Ddisplay.c53 if (dssdev->ctrl.pixel_size == 24) in omapdss_default_get_recommended_bpp()
/drivers/gpu/drm/vmwgfx/device_include/
Dsvga3d_surfacedefs.h987 const surf_size_struct *pixel_size, in svga3dsurface_get_size_in_blocks() argument
990 block_size->width = DIV_ROUND_UP(pixel_size->width, in svga3dsurface_get_size_in_blocks()
992 block_size->height = DIV_ROUND_UP(pixel_size->height, in svga3dsurface_get_size_in_blocks()
994 block_size->depth = DIV_ROUND_UP(pixel_size->depth, in svga3dsurface_get_size_in_blocks()