Searched refs:pll9 (Results 1 – 3 of 3) sorted by relevance
| /drivers/gpu/drm/i915/ |
| D | intel_ddi.c | 1754 crtc_state->dpll_hw_state.pll9 = 5 << PORT_PLL_LOCK_THRESHOLD_SHIFT; in bxt_ddi_pll_select()
2871 temp |= pll->config.hw_state.pll9; in bxt_ddi_pll_enable()
2961 hw_state->pll9 = I915_READ(BXT_PORT_PLL(port, 9)); in bxt_ddi_pll_get_hw_state()
2962 hw_state->pll9 &= PORT_PLL_LOCK_THRESHOLD_MASK; in bxt_ddi_pll_get_hw_state()
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| D | i915_drv.h | 387 uint32_t ebb0, ebb4, pll0, pll1, pll2, pll3, pll6, pll8, pll9, pll10, member
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| D | intel_display.c | 12097 pipe_config->dpll_hw_state.pll9, in intel_dump_pipe_config()
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