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Searched refs:pll_en (Results 1 – 2 of 2) sorted by relevance

/drivers/clk/mediatek/
Dclk-pll.c94 int pll_en; in mtk_pll_set_rate_regs() local
96 pll_en = readl(pll->base_addr + REG_CON0) & CON0_BASE_EN; in mtk_pll_set_rate_regs()
117 if (pll_en) in mtk_pll_set_rate_regs()
124 if (pll_en) in mtk_pll_set_rate_regs()
/drivers/clk/samsung/
Dclk-pll.c801 u32 pll_en = __raw_readl(pll->lock_reg + PLLS3C2410_ENABLE_REG_OFFSET); in samsung_s3c2410_pll_enable() local
802 u32 pll_en_orig = pll_en; in samsung_s3c2410_pll_enable()
805 pll_en &= ~BIT(bit); in samsung_s3c2410_pll_enable()
807 pll_en |= BIT(bit); in samsung_s3c2410_pll_enable()
809 __raw_writel(pll_en, pll->lock_reg + PLLS3C2410_ENABLE_REG_OFFSET); in samsung_s3c2410_pll_enable()