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Searched refs:r8 (Results 1 – 18 of 18) sorted by relevance

/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/
Dkernel.fuc102 push $r8
103 nv_iord($r8, NV_PPWR_TIMER_LOW)
106 sub b32 $r9 $r8
109 pop $r8
123 push $r8
124 nv_iord($r8, NV_PPWR_TIMER_LOW)
131 sub b32 $r9 $r8
135 pop $r8
141 // $r8 - NV_PPWR_INTR
182 push $r8
[all …]
Dmemx.fuc85 movw $r8 0x1610
86 nv_rd32($r7, $r8)
91 nv_wr32($r8, $r7)
95 nv_rd32($r8, $r6)
96 and $r8 $r7
97 nv_wr32($r6, $r8)
100 nv_rd32($r8, $r6)
101 and $r8 $r7
102 nv_wr32($r6, $r8)
105 nv_rd32($r8, $r6)
[all …]
/drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/
Dcom.fuc35 ld b32 $r8 D[$r13 + 0x0] // GET
37 xor $r8 8
38 cmpu b32 $r8 $r9
46 and $r8 $r9 7
47 shl b32 $r8 3
48 add b32 $r8 $r13
49 add b32 $r8 8
50 st b32 D[$r8 + 0x0] $r14
51 st b32 D[$r8 + 0x4] $r15
69 ld b32 $r8 D[$r13 + 0x0] // GET
[all …]
Dgpc.fuc328 push $r8
329 mov $r8 $flags
330 push $r8
361 pop $r8
362 mov $flags $r8
363 pop $r8
Dhub.fuc309 push $r8
310 mov $r8 $flags
311 push $r8
380 pop $r8
381 mov $flags $r8
382 pop $r8
/drivers/power/
Dintel_mid_battery.c259 u8 r8; in pmic_battery_read_status() local
280 if (intel_scu_ipc_ioread8(PMIC_BATT_CHR_SCHRGINT_ADDR, &r8)) { in pmic_battery_read_status()
292 if (r8 & PMIC_BATT_CHR_SBATDET_MASK) { in pmic_battery_read_status()
303 if (r8 & PMIC_BATT_CHR_SBATOVP_MASK) { in pmic_battery_read_status()
308 } else if (r8 & PMIC_BATT_CHR_STEMP_MASK) { in pmic_battery_read_status()
315 if (r8 & PMIC_BATT_CHR_SDCLMT_MASK) { in pmic_battery_read_status()
323 if (r8 & PMIC_BATT_CHR_SUSBDET_MASK) { in pmic_battery_read_status()
332 if (r8 & PMIC_BATT_CHR_SUSBOVP_MASK) { in pmic_battery_read_status()
354 if (r8 & PMIC_BATT_CHR_SCOMP_MASK) { in pmic_battery_read_status()
561 u8 r8; in pmic_battery_handle_intrpt() local
[all …]
/drivers/net/wireless/b43/
Dphy_a.c102 u16 freq, r8, tmp; in aphy_channel_switch() local
106 r8 = b43_radio_read16(dev, 0x0008); in aphy_channel_switch()
108 b43_radio_write16(dev, 0x0008, r8); in aphy_channel_switch()
121 r8 = 3 * freq / 116; /* is equal to r8 = freq * 0.025862 */ in aphy_channel_switch()
123 b43_radio_write16(dev, 0x0007, (r8 << 4) | r8); in aphy_channel_switch()
124 b43_radio_write16(dev, 0x0020, (r8 << 4) | r8); in aphy_channel_switch()
125 b43_radio_write16(dev, 0x0021, (r8 << 4) | r8); in aphy_channel_switch()
126 b43_radio_maskset(dev, 0x0022, 0x000F, (r8 << 4)); in aphy_channel_switch()
127 b43_radio_write16(dev, 0x002A, (r8 << 4)); in aphy_channel_switch()
128 b43_radio_write16(dev, 0x002B, (r8 << 4)); in aphy_channel_switch()
[all …]
Dradio_2055.c271 #define RADIOREGS(r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, \ argument
281 .radio_pll_lfc2 = r8, \
/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/
Dcom.fuc273 add b32 $r8 $r6 0x180
274 shl b32 $r8 8
275 iowr I[$r8] $r7
437 clear b32 $r8
464 st b8 D[$sp + $r8] $r12
465 add b32 $r8 1
476 ld b32 $r8 D[$r0 + #ctx_xcnt]
477 mulu $r6 $r8
484 mulu $r7 $r8
542 extr $r8 $r7 4:7
[all …]
/drivers/parisc/
Dsuperio.c292 u8 r8; in superio_mask_irq() local
302 r8 = inb(IC_PIC1+1); in superio_mask_irq()
303 r8 |= (1 << irq); in superio_mask_irq()
304 outb (r8,IC_PIC1+1); in superio_mask_irq()
310 u8 r8; in superio_unmask_irq() local
319 r8 = inb(IC_PIC1+1); in superio_unmask_irq()
320 r8 &= ~(1 << irq); in superio_unmask_irq()
321 outb (r8,IC_PIC1+1); in superio_unmask_irq()
/drivers/media/dvb-frontends/
Dstv6110.c183 u8 r8, ret = 0x04; in stv6110_set_bandwidth() local
187 r8 = 31; in stv6110_set_bandwidth()
189 r8 = 0; in stv6110_set_bandwidth()
191 r8 = (bandwidth / 2) / 1000000 - 5; in stv6110_set_bandwidth()
196 priv->regs[RSTV6110_CTRL3] |= (r8 & 0x1f); in stv6110_set_bandwidth()
374 u8 r8 = 0; in stv6110_get_bandwidth() local
379 r8 = priv->regs[RSTV6110_CTRL3] & 0x1f; in stv6110_get_bandwidth()
380 *bandwidth = (r8 + 5) * 2000000;/* x2 for ZIF tuner BW/2 = F+5 Mhz */ in stv6110_get_bandwidth()
/drivers/gpu/drm/nouveau/nvkm/engine/sec/fuc/
Dg98.fuc0s186 add b32 $r8 $r6 0x180
187 shl b32 $r8 8
188 iowr I[$r8] $r7
456 shr b32 $r8 $r5 8
458 or $r4 $r8
464 shr b32 $r8 $r7 8
466 or $r6 $r8
470 ld b32 $r8 D[$r0 + #ctx_mode]
471 shl b32 $r8 2
474 ld b16 $r9 D[$r8 + #sec_dtable]
[all …]
/drivers/misc/sgi-xp/
Dxp_nofault.S26 mov r8=r0 // Stage a success return value
34 mov r8=1 // Return value of 1
/drivers/input/touchscreen/
Dintel-mid-touch.c453 u8 r8; in mrstouch_chan_parse() local
456 err = intel_scu_ipc_ioread8(PMICADDR0 + i, &r8); in mrstouch_chan_parse()
460 if (r8 == END_OF_CHANNEL) { in mrstouch_chan_parse()
/drivers/sh/clk/
Dcpg.c39 static unsigned int r8(const void __iomem *addr) in r8() function
64 read = r8; in sh_clk_mstp_enable()
/drivers/scsi/csiostor/
Dt4fw_api_stor.h528 __be64 r8; member
/drivers/net/ethernet/chelsio/cxgb4/
Dt4fw_api.h2819 __be64 r8; member
/drivers/net/wireless/brcm80211/brcmfmac/
Dsdio.c350 __le32 r8; /* v5 */ member