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Searched refs:ref_clk (Results 1 – 25 of 26) sorted by relevance

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/drivers/clk/imx/
Dclk-pllv2.c80 long mfi, mfn, mfd, pdf, ref_clk; in __clk_pllv2_recalc_rate() local
93 ref_clk = 2 * parent_rate; in __clk_pllv2_recalc_rate()
95 ref_clk *= 2; in __clk_pllv2_recalc_rate()
97 ref_clk /= (pdf + 1); in __clk_pllv2_recalc_rate()
98 temp = (u64) ref_clk * abs(mfn); in __clk_pllv2_recalc_rate()
101 temp = (ref_clk * mfi) - temp; in __clk_pllv2_recalc_rate()
103 temp = (ref_clk * mfi) + temp; in __clk_pllv2_recalc_rate()
/drivers/phy/
Dphy-samsung-usb2.c40 ret = clk_prepare_enable(drv->ref_clk); in samsung_usb2_phy_power_on()
54 clk_disable_unprepare(drv->ref_clk); in samsung_usb2_phy_power_on()
79 clk_disable_unprepare(drv->ref_clk); in samsung_usb2_phy_power_off()
206 drv->ref_clk = devm_clk_get(dev, "ref"); in samsung_usb2_phy_probe()
207 if (IS_ERR(drv->ref_clk)) { in samsung_usb2_phy_probe()
209 return PTR_ERR(drv->ref_clk); in samsung_usb2_phy_probe()
212 drv->ref_rate = clk_get_rate(drv->ref_clk); in samsung_usb2_phy_probe()
Dphy-exynos5-usbdrd.c181 struct clk *ref_clk; member
458 clk_prepare_enable(phy_drd->ref_clk); in exynos5_usbdrd_phy_power_on()
493 clk_disable_unprepare(phy_drd->ref_clk); in exynos5_usbdrd_phy_power_on()
519 clk_disable_unprepare(phy_drd->ref_clk); in exynos5_usbdrd_phy_power_off()
559 phy_drd->ref_clk = devm_clk_get(phy_drd->dev, "ref"); in exynos5_usbdrd_phy_clk_handle()
560 if (IS_ERR(phy_drd->ref_clk)) { in exynos5_usbdrd_phy_clk_handle()
562 return PTR_ERR(phy_drd->ref_clk); in exynos5_usbdrd_phy_clk_handle()
564 ref_rate = clk_get_rate(phy_drd->ref_clk); in exynos5_usbdrd_phy_clk_handle()
Dphy-samsung-usb2.h40 struct clk *ref_clk; member
Dphy-qcom-ufs.c213 &phy_common->ref_clk); in ufs_qcom_phy_init_clks()
417 ret = clk_prepare_enable(phy->ref_clk); in ufs_qcom_phy_enable_ref_clk()
467 clk_disable_unprepare(phy->ref_clk); in ufs_qcom_phy_disable_ref_clk()
Dphy-qcom-ufs-i.h93 struct clk *ref_clk; member
/drivers/spi/
Dspi-cadence.c117 struct clk *ref_clk; member
506 xspi->ref_clk = devm_clk_get(&pdev->dev, "ref_clk"); in cdns_spi_probe()
507 if (IS_ERR(xspi->ref_clk)) { in cdns_spi_probe()
509 ret = PTR_ERR(xspi->ref_clk); in cdns_spi_probe()
519 ret = clk_prepare_enable(xspi->ref_clk); in cdns_spi_probe()
561 xspi->clk_rate = clk_get_rate(xspi->ref_clk); in cdns_spi_probe()
577 clk_disable_unprepare(xspi->ref_clk); in cdns_spi_probe()
603 clk_disable_unprepare(xspi->ref_clk); in cdns_spi_remove()
629 clk_disable_unprepare(xspi->ref_clk); in cdns_spi_suspend()
658 ret = clk_prepare_enable(xspi->ref_clk); in cdns_spi_resume()
/drivers/clk/
Dclk-moxart.c22 struct clk *clk, *ref_clk; in moxart_of_pll_clk_init() local
39 ref_clk = of_clk_get(node, 0); in moxart_of_pll_clk_init()
40 if (IS_ERR(ref_clk)) { in moxart_of_pll_clk_init()
Dclk-asm9260.c271 const char *ref_clk, *pll_clk = "pll"; in asm9260_acc_init() local
283 ref_clk = of_clk_get_parent_name(np, 0); in asm9260_acc_init()
284 accuracy = clk_get_accuracy(__clk_lookup(ref_clk)); in asm9260_acc_init()
286 ref_clk, 0, rate, accuracy); in asm9260_acc_init()
294 mc->parent_names[0] = ref_clk; in asm9260_acc_init()
/drivers/clk/tegra/
Dclk-dfll.c272 struct clk *ref_clk; member
385 ret = clk_enable(td->ref_clk); in tegra_dfll_runtime_resume()
394 clk_disable(td->ref_clk); in tegra_dfll_runtime_resume()
402 clk_disable(td->ref_clk); in tegra_dfll_runtime_resume()
421 clk_disable(td->ref_clk); in tegra_dfll_runtime_suspend()
1283 td->ref_clk = devm_clk_get(td->dev, "ref"); in dfll_init_clks()
1284 if (IS_ERR(td->ref_clk)) { in dfll_init_clks()
1286 return PTR_ERR(td->ref_clk); in dfll_init_clks()
1318 td->ref_rate = clk_get_rate(td->ref_clk); in dfll_init()
1327 ret = clk_prepare(td->ref_clk); in dfll_init()
[all …]
/drivers/gpu/drm/radeon/
Drv6xx_dpm.c164 u32 ref_clk = rdev->clock.spll.reference_freq; in rv6xx_output_stepping() local
184 fb_divider = ((step->vco_frequency * pi->spll_ref_div) / ref_clk) >> in rv6xx_output_stepping()
429 u32 ref_clk = rdev->clock.spll.reference_freq; in rv6xx_compute_count_for_delay() local
431 return rv6xx_scale_count_given_unit(rdev, delay_us * (ref_clk / 100), unit); in rv6xx_compute_count_for_delay()
552 u32 ref_clk = rdev->clock.spll.reference_freq; in rv6xx_program_engine_spread_spectrum() local
562 vco_freq = rv6xx_calculate_vco_frequency(ref_clk, &dividers, in rv6xx_program_engine_spread_spectrum()
568 (ref_clk / (dividers.ref_div + 1)), in rv6xx_program_engine_spread_spectrum()
574 (ref_clk / (dividers.ref_div + 1))); in rv6xx_program_engine_spread_spectrum()
633 u32 ref_clk, in rv6xx_find_memory_clock_with_highest_vco() argument
643 vco_freq_temp = rv6xx_calculate_vco_frequency(ref_clk, &req_dividers, in rv6xx_find_memory_clock_with_highest_vco()
[all …]
Dcypress_dpm.c443 u32 ref_clk = rdev->clock.mpll.reference_freq; in cypress_map_clkf_to_ibias() local
444 u32 vco = clkf * ref_clk; in cypress_map_clkf_to_ibias()
447 if (ref_clk == 10000) { in cypress_map_clkf_to_ibias()
/drivers/gpu/drm/msm/dsi/pll/
Ddsi_pll_28nm.c268 u32 ref_clk = VCO_REF_CLK_RATE; in dsi_pll_28nm_clk_recalc_rate() local
276 ref_clk += (doubler * VCO_REF_CLK_RATE); in dsi_pll_28nm_clk_recalc_rate()
285 vco_rate = ref_clk * sdm_byp_div; in dsi_pll_28nm_clk_recalc_rate()
299 vco_rate = (ref_clk * (sdm_dc_off + 1)) + in dsi_pll_28nm_clk_recalc_rate()
300 mult_frac(ref_clk, sdm_freq_seed, BIT(16)); in dsi_pll_28nm_clk_recalc_rate()
/drivers/gpu/drm/i915/
Dintel_dsi_pll.c166 int ref_clk; in dsi_calc_mnp() local
177 ref_clk = 100000; in dsi_calc_mnp()
182 ref_clk = 25000; in dsi_calc_mnp()
194 int calc_dsi_clk = (m * ref_clk) / (p * n); in dsi_calc_mnp()
/drivers/video/fbdev/aty/
Dradeon_base.c562 rinfo->pll.ref_clk = (*val) / 10; in radeon_read_xtal_OF()
706 rinfo->pll.ref_clk = xtal; in radeon_probe_pll_params()
731 rinfo->pll.ref_clk = 2700; in radeon_get_pllinfo()
742 rinfo->pll.ref_clk = 2700; in radeon_get_pllinfo()
752 rinfo->pll.ref_clk = 2700; in radeon_get_pllinfo()
762 rinfo->pll.ref_clk = 2700; in radeon_get_pllinfo()
773 rinfo->pll.ref_clk = 2700; in radeon_get_pllinfo()
798 rinfo->pll.ref_clk = BIOS_IN16(pll_info_block + 0x0e); in radeon_get_pllinfo()
833 rinfo->pll.ref_clk / 100, rinfo->pll.ref_clk % 100, in radeon_get_pllinfo()
1629 rinfo->pll.ref_div, rinfo->pll.ref_clk, in radeon_calc_pll_regs()
[all …]
Daty128fb.c410 u32 ref_clk; member
922 par->constants.ref_clk = BIOS_IN16(bios_pll + 0x0e); in aty128_get_pllinfo()
927 par->constants.ref_clk); in aty128_get_pllinfo()
970 if (!par->constants.ref_clk) in aty128_timings()
971 par->constants.ref_clk = 2950; in aty128_timings()
979 par->constants.xclk = round_div((2 * Nx * par->constants.ref_clk), in aty128_timings()
1403 d = c.ref_clk; in aty128_var_to_pll()
Datyfb.h51 int ref_clk; member
Dradeonfb.h142 int ref_clk; member
/drivers/net/wireless/cw1200/
Dcw1200_sdio.c34 .ref_clk = 38400,
310 self->pdata->ref_clk, in cw1200_sdio_probe()
Dmain.c523 int ref_clk, const u8 *macaddr, in cw1200_core_probe() argument
539 priv->hw_refclk = ref_clk; in cw1200_core_probe()
Dcw1200.h297 int ref_clk, const u8 *macaddr,
Dcw1200_spi.c419 self->pdata->ref_clk, in cw1200_spi_probe()
/drivers/video/fbdev/intelfb/
Dintelfbhw.c45 int min_vco, max_vco, p_transition_clk, ref_clk; member
661 return plls[index].ref_clk * m / n / p; in calc_vclock3()
672 vco = pll->ref_clk * m / n; in calc_vclock()
974 m = ROUND_UP_TO(f_vco * n, pll->ref_clk) / pll->ref_clk; in calc_pll_params()
/drivers/video/fbdev/mbx/
Dmbxfb.c129 unsigned int ref_clk = 13000; /* FIXME: take from platform data */ in mbxfb_get_pixclock() local
149 clk = (ref_clk * m) / (n * (1 << p)); in mbxfb_get_pixclock()
/drivers/video/fbdev/
Dsmscufx.c534 const u32 ref_clk = 25000000; in ufx_calc_pll_values() local
539 u32 ref_freq0 = ref_clk / div_r0; in ufx_calc_pll_values()

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