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Searched refs:reg_block (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Ddce_v8_0.c3091 u32 reg_block, lb_interrupt_mask; in dce_v8_0_set_crtc_vblank_interrupt_state() local
3100 reg_block = CRTC0_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
3103 reg_block = CRTC1_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
3106 reg_block = CRTC2_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
3109 reg_block = CRTC3_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
3112 reg_block = CRTC4_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
3115 reg_block = CRTC5_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
3124 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block); in dce_v8_0_set_crtc_vblank_interrupt_state()
3126 WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask); in dce_v8_0_set_crtc_vblank_interrupt_state()
3129 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block); in dce_v8_0_set_crtc_vblank_interrupt_state()
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Datom.c187 idx += gctx->reg_block; in atom_get_src_int()
257 val = gctx->reg_block; in atom_get_src_int()
462 idx += gctx->reg_block; in atom_put_dst()
527 gctx->reg_block = val; in atom_put_dst()
916 ctx->ctx->reg_block = U16(*ptr); in atom_op_setregblock()
918 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block); in atom_op_setregblock()
1274 ctx->reg_block = 0; in amdgpu_atom_execute_table()
Datom.h136 uint16_t reg_block; member
Damdgpu_atombios.c1442 ATOM_INIT_REG_BLOCK *reg_block = in amdgpu_atombios_init_mc_reg_table() local
1447 ((u8 *)reg_block + (2 * sizeof(u16)) + in amdgpu_atombios_init_mc_reg_table()
1448 le16_to_cpu(reg_block->usRegIndexTblSize)); in amdgpu_atombios_init_mc_reg_table()
1449 ATOM_INIT_REG_INDEX_FORMAT *format = &reg_block->asRegIndexBuf[0]; in amdgpu_atombios_init_mc_reg_table()
1450 num_entries = (u8)((le16_to_cpu(reg_block->usRegIndexTblSize)) / in amdgpu_atombios_init_mc_reg_table()
1487 ((u8 *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize)); in amdgpu_atombios_init_mc_reg_table()
/drivers/gpu/drm/radeon/
Datom.c190 idx += gctx->reg_block; in atom_get_src_int()
260 val = gctx->reg_block; in atom_get_src_int()
465 idx += gctx->reg_block; in atom_put_dst()
530 gctx->reg_block = val; in atom_put_dst()
884 ctx->ctx->reg_block = U16(*ptr); in atom_op_setregblock()
886 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block); in atom_op_setregblock()
1228 ctx->reg_block = 0; in atom_execute_table_scratch_unlocked()
Datom.h137 uint16_t reg_block; member
Dradeon_atombios.c3996 ATOM_INIT_REG_BLOCK *reg_block = in radeon_atom_init_mc_reg_table() local
4001 ((u8 *)reg_block + (2 * sizeof(u16)) + in radeon_atom_init_mc_reg_table()
4002 le16_to_cpu(reg_block->usRegIndexTblSize)); in radeon_atom_init_mc_reg_table()
4003 ATOM_INIT_REG_INDEX_FORMAT *format = &reg_block->asRegIndexBuf[0]; in radeon_atom_init_mc_reg_table()
4004 num_entries = (u8)((le16_to_cpu(reg_block->usRegIndexTblSize)) / in radeon_atom_init_mc_reg_table()
4041 ((u8 *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize)); in radeon_atom_init_mc_reg_table()
/drivers/net/ethernet/intel/i40e/
Di40e_common.c1071 u32 reg_block = 0; in i40e_pre_tx_queue_cfg() local
1075 reg_block = abs_queue_idx / 128; in i40e_pre_tx_queue_cfg()
1079 reg_val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block)); in i40e_pre_tx_queue_cfg()
1088 wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), reg_val); in i40e_pre_tx_queue_cfg()
1374 u32 reg_block = 0; in i40e_clear_hw() local
1377 reg_block = abs_queue_idx / 128; in i40e_clear_hw()
1381 val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block)); in i40e_clear_hw()
1386 wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), val); in i40e_clear_hw()