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Searched refs:reg_type (Results 1 – 25 of 26) sorted by relevance

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/drivers/staging/comedi/drivers/
Dni_pcimio.c465 .reg_type = ni_reg_611x,
480 .reg_type = ni_reg_611x,
531 .reg_type = ni_reg_6711,
541 .reg_type = ni_reg_6711,
551 .reg_type = ni_reg_6713,
561 .reg_type = ni_reg_6713,
571 .reg_type = ni_reg_6711,
581 .reg_type = ni_reg_6711,
592 .reg_type = ni_reg_6713,
602 .reg_type = ni_reg_6713,
[all …]
Dni_stc.h963 int reg_type; member
/drivers/gpu/drm/exynos/
Dexynos_drm_g2d.c562 enum g2d_reg_type reg_type; in g2d_get_reg_type() local
570 reg_type = REG_TYPE_SRC; in g2d_get_reg_type()
573 reg_type = REG_TYPE_SRC_PLANE2; in g2d_get_reg_type()
580 reg_type = REG_TYPE_DST; in g2d_get_reg_type()
583 reg_type = REG_TYPE_DST_PLANE2; in g2d_get_reg_type()
586 reg_type = REG_TYPE_PAT; in g2d_get_reg_type()
589 reg_type = REG_TYPE_MSK; in g2d_get_reg_type()
592 reg_type = REG_TYPE_NONE; in g2d_get_reg_type()
597 return reg_type; in g2d_get_reg_type()
628 enum g2d_reg_type reg_type, in g2d_check_buf_desc_is_valid() argument
[all …]
/drivers/crypto/qat/qat_common/
Dqat_hal.c922 enum icp_qat_uof_regtype reg_type, in qat_hal_rd_rel_reg() argument
931 reg_addr = qat_hal_get_reg_addr(reg_type, reg_num); in qat_hal_rd_rel_reg()
936 switch (reg_type) { in qat_hal_rd_rel_reg()
983 enum icp_qat_uof_regtype reg_type, in qat_hal_wr_rel_reg() argument
996 dest_addr = qat_hal_get_reg_addr(reg_type, reg_num); in qat_hal_wr_rel_reg()
1008 switch (reg_type) { in qat_hal_wr_rel_reg()
1137 enum icp_qat_uof_regtype reg_type, in qat_hal_put_rel_rd_xfer() argument
1160 switch (reg_type) { in qat_hal_put_rel_rd_xfer()
1178 enum icp_qat_uof_regtype reg_type, in qat_hal_put_rel_wr_xfer() argument
1208 xfr_addr = qat_hal_get_reg_addr(reg_type, reg_num); in qat_hal_put_rel_wr_xfer()
[all …]
Dadf_common_drv.h202 enum icp_qat_uof_regtype reg_type,
206 enum icp_qat_uof_regtype reg_type,
210 enum icp_qat_uof_regtype reg_type,
Dqat_uclo.c748 enum icp_qat_uof_regtype reg_type, in qat_uclo_init_reg() argument
751 switch (reg_type) { in qat_uclo_init_reg()
757 return qat_hal_init_gpr(handle, ae, ctx_mask, reg_type, in qat_uclo_init_reg()
768 return qat_hal_init_rd_xfer(handle, ae, ctx_mask, reg_type, in qat_uclo_init_reg()
775 return qat_hal_init_wr_xfer(handle, ae, ctx_mask, reg_type, in qat_uclo_init_reg()
780 pr_err("QAT: UOF uses not supported reg type 0x%x\n", reg_type); in qat_uclo_init_reg()
809 init_regsym->reg_type, in qat_uclo_init_reg_sym()
824 init_regsym->reg_type, in qat_uclo_init_reg_sym()
Dicp_qat_uclo.h272 char reg_type; member
304 unsigned char reg_type; member
/drivers/gpio/
Dgpio-intel-mid.c82 enum GPIO_REG reg_type) in gpio_reg() argument
88 return priv->reg_base + reg_type * nreg * 4 + reg * 4; in gpio_reg()
92 enum GPIO_REG reg_type) in gpio_reg_2bit() argument
98 return priv->reg_base + reg_type * nreg * 4 + reg * 4; in gpio_reg_2bit()
Dgpio-crystalcove.c94 static inline int to_reg(int gpio, enum ctrl_register reg_type) in to_reg() argument
101 if (reg_type == CTRL_IN) { in to_reg()
/drivers/net/ethernet/ibm/ehea/
Dehea_main.c287 arr[i].reg_type = EHEA_BCMC_BROADCAST | in ehea_update_bcmc_registrations()
293 arr[i].reg_type = EHEA_BCMC_BROADCAST | in ehea_update_bcmc_registrations()
305 arr[i].reg_type = EHEA_BCMC_MULTICAST | in ehea_update_bcmc_registrations()
308 arr[i].reg_type |= EHEA_BCMC_SCOPE_ALL; in ehea_update_bcmc_registrations()
313 arr[i].reg_type = EHEA_BCMC_MULTICAST | in ehea_update_bcmc_registrations()
316 arr[i].reg_type |= EHEA_BCMC_SCOPE_ALL; in ehea_update_bcmc_registrations()
1714 u8 reg_type; in ehea_broadcast_reg_helper() local
1717 reg_type = EHEA_BCMC_BROADCAST | EHEA_BCMC_UNTAGGED; in ehea_broadcast_reg_helper()
1720 reg_type, port->mac_addr, 0, hcallid); in ehea_broadcast_reg_helper()
1729 reg_type = EHEA_BCMC_BROADCAST | EHEA_BCMC_VLANID_ALL; in ehea_broadcast_reg_helper()
[all …]
Dehea_phyp.c588 const u8 reg_type, const u64 mc_mac_addr, in ehea_h_reg_dereg_bcmc() argument
595 r6_reg_type = EHEA_BMASK_SET(H_REGBCMC_REGTYPE, reg_type); in ehea_h_reg_dereg_bcmc()
Dehea.h426 u8 reg_type; /* Registration Type */ member
Dehea_phyp.h438 const u8 reg_type, const u64 mc_mac_addr,
/drivers/infiniband/hw/nes/
Dnes_user.h94 __u32 reg_type; /* indicates if id is memory, QP or CQ */ member
Dnes_verbs.c2337 nes_debug(NES_DBG_MR, "Memory Registration type = %08X.\n", req.reg_type); in nes_reg_user_mr()
2339 switch (req.reg_type) { in nes_reg_user_mr()
2575 if (req.reg_type == IWNES_MEMREG_TYPE_QP) { in nes_reg_user_mr()
2622 if (req.reg_type == IWNES_MEMREG_TYPE_QP) { in nes_reg_user_mr()
2629 nesmr->mode = req.reg_type; in nes_reg_user_mr()
/drivers/net/wireless/mwifiex/
Ddebugfs.c453 u32 reg_type = 0, reg_offset = 0, reg_value = UINT_MAX; in mwifiex_regrdwr_write() local
464 sscanf(buf, "%u %x %x", &reg_type, &reg_offset, &reg_value); in mwifiex_regrdwr_write()
466 if (reg_type == 0 || reg_offset == 0) { in mwifiex_regrdwr_write()
470 saved_reg_type = reg_type; in mwifiex_regrdwr_write()
Dsta_ioctl.c1233 mwifiex_reg_write(struct mwifiex_private *priv, u32 reg_type, in mwifiex_reg_write() argument
1238 reg_rw.type = cpu_to_le32(reg_type); in mwifiex_reg_write()
1252 mwifiex_reg_read(struct mwifiex_private *priv, u32 reg_type, in mwifiex_reg_read() argument
1258 reg_rw.type = cpu_to_le32(reg_type); in mwifiex_reg_read()
Dmain.h1404 int mwifiex_reg_write(struct mwifiex_private *priv, u32 reg_type,
1407 int mwifiex_reg_read(struct mwifiex_private *priv, u32 reg_type,
/drivers/scsi/libsas/
Dsas_host_smp.c117 u8 reg_type, u8 reg_index, u8 reg_count, in sas_host_smp_write_gpio() argument
128 written = i->dft->lldd_write_gpio(sas_ha, reg_type, reg_index, in sas_host_smp_write_gpio()
/drivers/staging/rdma/ehca/
Dehca_mrmw.h59 enum ehca_reg_type reg_type);
Dehca_mrmw.c1030 enum ehca_reg_type reg_type) in ehca_reg_mr() argument
1054 if (reg_type == EHCA_REG_BUSMAP_MR) in ehca_reg_mr()
1056 else if (reg_type == EHCA_REG_MR) in ehca_reg_mr()
/drivers/pinctrl/meson/
Dpinctrl-meson.c131 enum meson_reg_type reg_type, in meson_calc_reg_and_bit() argument
134 struct meson_reg_desc *desc = &bank->regs[reg_type]; in meson_calc_reg_and_bit()
/drivers/scsi/isci/
Dhost.h515 int isci_gpio_write(struct sas_ha_struct *, u8 reg_type, u8 reg_index,
Dhost.c2792 int isci_gpio_write(struct sas_ha_struct *sas_ha, u8 reg_type, u8 reg_index, in isci_gpio_write() argument
2798 switch (reg_type) { in isci_gpio_write()
/drivers/staging/slicoss/
Dslic.h321 ushort reg_type[32]; member

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