Searched refs:saved_reg (Results 1 – 5 of 5) sorted by relevance
/drivers/tty/serial/ |
D | imx.c | 220 unsigned int saved_reg[10]; member 2020 writel(sport->saved_reg[4], sport->port.membase + UFCR); in serial_imx_restore_context() 2021 writel(sport->saved_reg[5], sport->port.membase + UESC); in serial_imx_restore_context() 2022 writel(sport->saved_reg[6], sport->port.membase + UTIM); in serial_imx_restore_context() 2023 writel(sport->saved_reg[7], sport->port.membase + UBIR); in serial_imx_restore_context() 2024 writel(sport->saved_reg[8], sport->port.membase + UBMR); in serial_imx_restore_context() 2025 writel(sport->saved_reg[9], sport->port.membase + IMX21_UTS); in serial_imx_restore_context() 2026 writel(sport->saved_reg[0], sport->port.membase + UCR1); in serial_imx_restore_context() 2027 writel(sport->saved_reg[1] | UCR2_SRST, sport->port.membase + UCR2); in serial_imx_restore_context() 2028 writel(sport->saved_reg[2], sport->port.membase + UCR3); in serial_imx_restore_context() [all …]
|
/drivers/clk/mvebu/ |
D | common.c | 199 u32 saved_reg; member 225 ctrl->saved_reg = readl(ctrl->base); in mvebu_clk_gating_suspend() 231 writel(ctrl->saved_reg, ctrl->base); in mvebu_clk_gating_resume()
|
/drivers/gpu/drm/nouveau/dispnv04/ |
D | dfp.c | 236 if (nv_encoder->dcb->type == DCB_OUTPUT_LVDS && nv04_display(dev)->saved_reg.sel_clk & 0xf0) { in nv04_dfp_prepare_sel_clk() 237 int shift = (nv04_display(dev)->saved_reg.sel_clk & 0x50) ? 0 : 1; in nv04_dfp_prepare_sel_clk() 288 struct nv04_crtc_reg *savep = &nv04_display(dev)->saved_reg.crtc_reg[nv_crtc->index]; in nv04_dfp_mode_set() 602 (&nv04_display(dev)->saved_reg.crtc_reg[head].pllvals); in nv04_dfp_restore()
|
D | crtc.c | 468 struct nv04_crtc_reg *savep = &nv04_display(dev)->saved_reg.crtc_reg[nv_crtc->index]; in nv_crtc_mode_set_regs() 546 …regp->CRTC[NV_CIO_CRE_TVOUT_LATENCY] = nv04_display(dev)->saved_reg.crtc_reg[0].CRTC[NV_CIO_CRE_TV… in nv_crtc_mode_set_regs() 670 struct nv04_mode_state *saved = &nv04_display(dev)->saved_reg; in nv_crtc_save() 690 uint8_t saved_cr21 = nv04_display(dev)->saved_reg.crtc_reg[head].CRTC[NV_CIO_CRE_21]; in nv_crtc_restore() 695 nouveau_hw_load_state(crtc->dev, head, &nv04_display(dev)->saved_reg); in nv_crtc_restore()
|
D | disp.h | 80 struct nv04_mode_state saved_reg; member
|