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Searched refs:sh_mem_config (Results 1 – 14 of 14) sorted by relevance

/drivers/gpu/drm/amd/amdkfd/
Dkfd_device_queue_manager_vi.c96 qpd->sh_mem_config = (qpd->sh_mem_config & in set_cache_memory_policy_vi()
118 if (qpd->sh_mem_config == 0) { in register_process_vi()
119 qpd->sh_mem_config = in register_process_vi()
133 qpd->sh_mem_config |= SH_MEM_ADDRESS_MODE_HSA32 << in register_process_vi()
138 qpd->sh_mem_config |= SH_MEM_ADDRESS_MODE_HSA64 << in register_process_vi()
Dkfd_device_queue_manager_cik.c93 qpd->sh_mem_config = (qpd->sh_mem_config & PTR32) in set_cache_memory_policy_cik()
112 if (qpd->sh_mem_config == 0) { in register_process_cik()
113 qpd->sh_mem_config = in register_process_cik()
124 qpd->sh_mem_config |= PTR32; in register_process_cik()
Dkfd_pm4_headers_vi.h169 uint32_t sh_mem_config; member
Dkfd_pm4_headers.h170 uint32_t sh_mem_config; member
Dkfd_packet_manager.c174 packet->sh_mem_config = qpd->sh_mem_config; in pm_create_map_process()
Dkfd_priv.h431 uint32_t sh_mem_config; member
Dkfd_device_queue_manager.c88 qpd->sh_mem_config, in program_sh_mem_settings()
1164 qpd->sh_mem_config, qpd->sh_mem_ape1_base, in set_cache_memory_policy()
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_amdkfd_gfx_v8.c50 uint32_t sh_mem_config,
161 uint32_t sh_mem_config, in kgd_program_sh_mem_settings() argument
170 WREG32(mmSH_MEM_CONFIG, sh_mem_config); in kgd_program_sh_mem_settings()
Damdgpu_amdkfd_gfx_v7.c90 uint32_t sh_mem_config, uint32_t sh_mem_ape1_base,
200 uint32_t sh_mem_config, in kgd_program_sh_mem_settings() argument
209 WREG32(mmSH_MEM_CONFIG, sh_mem_config); in kgd_program_sh_mem_settings()
Dgfx_v7_0.c2026 uint32_t sh_mem_config; in gmc_v7_0_init_compute_vmid() local
2036 sh_mem_config = SH_MEM_ALIGNMENT_MODE_UNALIGNED << in gmc_v7_0_init_compute_vmid()
2038 sh_mem_config |= MTYPE_NONCACHED << SH_MEM_CONFIG__DEFAULT_MTYPE__SHIFT; in gmc_v7_0_init_compute_vmid()
2043 WREG32(mmSH_MEM_CONFIG, sh_mem_config); in gmc_v7_0_init_compute_vmid()
Dgfx_v8_0.c2859 uint32_t sh_mem_config; in gfx_v8_0_init_compute_vmid() local
2870 sh_mem_config = SH_MEM_ADDRESS_MODE_HSA64 << in gfx_v8_0_init_compute_vmid()
2881 WREG32(mmSH_MEM_CONFIG, sh_mem_config); in gfx_v8_0_init_compute_vmid()
/drivers/gpu/drm/amd/include/
Dkgd_kfd_interface.h139 uint32_t sh_mem_config, uint32_t sh_mem_ape1_base,
/drivers/gpu/drm/radeon/
Dradeon_kfd.c68 uint32_t sh_mem_config, uint32_t sh_mem_ape1_base,
381 uint32_t sh_mem_config, in kgd_program_sh_mem_settings() argument
388 write_register(kgd, SH_MEM_CONFIG, sh_mem_config); in kgd_program_sh_mem_settings()
Dcik.c5791 uint32_t sh_mem_bases, sh_mem_config; in cik_pcie_init_compute_vmid() local
5794 sh_mem_config = ALIGNMENT_MODE(SH_MEM_ALIGNMENT_MODE_UNALIGNED); in cik_pcie_init_compute_vmid()
5795 sh_mem_config |= DEFAULT_MTYPE(MTYPE_NONCACHED); in cik_pcie_init_compute_vmid()
5801 WREG32(SH_MEM_CONFIG, sh_mem_config); in cik_pcie_init_compute_vmid()