Searched refs:src_info (Results 1 – 2 of 2) sorted by relevance
58 l1 |= cfg->src_info.psize << D40_MEM_LCSP1_SCFG_PSIZE_POS; in d40_log_cfg()59 l1 |= d40_width_to_bits(cfg->src_info.data_width) in d40_log_cfg()78 if (cfg->src_info.flow_ctrl == STEDMA40_NO_FLOW_CTRL) in d40_phy_cfg()102 if (cfg->src_info.psize != STEDMA40_PSIZE_PHY_1) { in d40_phy_cfg()104 src |= cfg->src_info.psize << D40_SREG_CFG_PSIZE_POS; in d40_phy_cfg()112 src |= d40_width_to_bits(cfg->src_info.data_width) in d40_phy_cfg()123 if (cfg->src_info.big_endian) in d40_phy_cfg()
86 .src_info.data_width = DMA_SLAVE_BUSWIDTH_1_BYTE,87 .src_info.psize = STEDMA40_PSIZE_PHY_1,88 .src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,100 .src_info.data_width = DMA_SLAVE_BUSWIDTH_1_BYTE,101 .src_info.psize = STEDMA40_PSIZE_LOG_1,102 .src_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL,1751 if (d40_psize_2_burst_size(is_log, conf->src_info.psize) * in d40_validate_conf()1752 conf->src_info.data_width != in d40_validate_conf()2143 struct stedma40_half_channel_info *src_info = &cfg->src_info; in d40_prep_sg_log() local2151 src_info->data_width, in d40_prep_sg_log()[all …]