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Searched refs:t1_t3 (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/gma500/
Dintel_bios.h459 u16 t1_t3; member
Dcdv_intel_dp.c2085 cur.t1_t3 = (pp_on & PANEL_POWER_UP_DELAY_MASK) >> in cdv_intel_dp_init()
2101 cur.t1_t3, cur.t8, cur.t9, cur.t10, cur.t11_t12); in cdv_intel_dp_init()
2104 intel_dp->panel_power_up_delay = cur.t1_t3 / 10; in cdv_intel_dp_init()
Dintel_bios.c96 dev_priv->edp.pps.t1_t3, dev_priv->edp.pps.t8, in parse_edp()
/drivers/gpu/drm/i915/
Dintel_bios.h545 u16 t1_t3; member
Dintel_dp.c5318 cur.t1_t3 = (pp_on & PANEL_POWER_UP_DELAY_MASK) >> in intel_dp_init_panel_power_sequencer()
5343 cur.t1_t3, cur.t8, cur.t9, cur.t10, cur.t11_t12); in intel_dp_init_panel_power_sequencer()
5349 spec.t1_t3 = 210 * 10; in intel_dp_init_panel_power_sequencer()
5360 vbt.t1_t3, vbt.t8, vbt.t9, vbt.t10, vbt.t11_t12); in intel_dp_init_panel_power_sequencer()
5367 assign_final(t1_t3); in intel_dp_init_panel_power_sequencer()
5375 intel_dp->panel_power_up_delay = get_delay(t1_t3); in intel_dp_init_panel_power_sequencer()
5433 pp_on = (seq->t1_t3 << PANEL_POWER_UP_DELAY_SHIFT) | in intel_dp_init_panel_power_sequencer_registers()