| /drivers/gpu/drm/radeon/ |
| D | btc_dpm.c | 1310 u16 *vddc, u16 *vddci) in btc_apply_voltage_delta_rules() argument
1315 if ((0 == *vddc) || (0 == *vddci)) in btc_apply_voltage_delta_rules()
1318 if (*vddc > *vddci) { in btc_apply_voltage_delta_rules()
1319 if ((*vddc - *vddci) > rdev->pm.dpm.dyn_state.vddc_vddci_delta) { in btc_apply_voltage_delta_rules()
1322 *vddci = (new_voltage < max_vddci) ? new_voltage : max_vddci; in btc_apply_voltage_delta_rules()
1325 if ((*vddci - *vddc) > rdev->pm.dpm.dyn_state.vddc_vddci_delta) { in btc_apply_voltage_delta_rules()
1327 (*vddci - rdev->pm.dpm.dyn_state.vddc_vddci_delta)); in btc_apply_voltage_delta_rules()
1801 if (state->low.vddci != ulv_pl->vddci) in btc_is_state_ulv_compatible()
2102 u16 vddc, vddci; in btc_apply_state_adjust_rules() local
2122 if (ps->high.vddci > max_limits->vddci) in btc_apply_state_adjust_rules()
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| D | ni_dpm.c | 792 u16 vddci; in ni_apply_state_adjust_rules() local
814 if (ps->performance_levels[i].vddci > max_limits->vddci) in ni_apply_state_adjust_rules()
815 ps->performance_levels[i].vddci = max_limits->vddci; in ni_apply_state_adjust_rules()
825 ps->performance_levels[0].vddci = in ni_apply_state_adjust_rules()
826 ps->performance_levels[ps->performance_level_count - 1].vddci; in ni_apply_state_adjust_rules()
843 vddci = ps->performance_levels[0].vddci; in ni_apply_state_adjust_rules()
847 if (vddci < ps->performance_levels[i].vddci) in ni_apply_state_adjust_rules()
848 vddci = ps->performance_levels[i].vddci; in ni_apply_state_adjust_rules()
852 ps->performance_levels[i].vddci = vddci; in ni_apply_state_adjust_rules()
858 if (ps->performance_levels[i].vddci < ps->performance_levels[i - 1].vddci) in ni_apply_state_adjust_rules()
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| D | si_dpm.c | 2997 u16 vddc, vddci, min_vce_voltage = 0; in si_apply_state_adjust_rules() local
3093 if (ps->performance_levels[i].vddci > max_limits->vddci) in si_apply_state_adjust_rules()
3094 ps->performance_levels[i].vddci = max_limits->vddci; in si_apply_state_adjust_rules()
3133 vddci = ps->performance_levels[ps->performance_level_count - 1].vddci; in si_apply_state_adjust_rules()
3136 vddci = ps->performance_levels[0].vddci; in si_apply_state_adjust_rules()
3158 ps->performance_levels[0].vddci = vddci; in si_apply_state_adjust_rules()
3187 ps->performance_levels[i].vddci = vddci; in si_apply_state_adjust_rules()
3193 if (ps->performance_levels[i].vddci < ps->performance_levels[i - 1].vddci) in si_apply_state_adjust_rules()
3194 ps->performance_levels[i].vddci = ps->performance_levels[i - 1].vddci; in si_apply_state_adjust_rules()
3210 max_limits->vddci, &ps->performance_levels[i].vddci); in si_apply_state_adjust_rules()
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| D | btc_dpm.h | 53 u16 *vddc, u16 *vddci);
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| D | rv770_dpm.c | 2204 pl->vddci = le16_to_cpu(clock_info->evergreen.usVDDCI); in rv7xx_parse_pplib_clock_info()
2228 eg_pi->acpi_vddci = pl->vddci; in rv7xx_parse_pplib_clock_info()
2250 u16 vddc, vddci, mvdd; in rv7xx_parse_pplib_clock_info() local
2251 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); in rv7xx_parse_pplib_clock_info()
2255 pl->vddci = vddci; in rv7xx_parse_pplib_clock_info()
2263 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = pl->vddci; in rv7xx_parse_pplib_clock_info()
2444 pl->sclk, pl->mclk, pl->vddc, pl->vddci); in rv770_dpm_print_power_state()
2447 pl->sclk, pl->mclk, pl->vddc, pl->vddci); in rv770_dpm_print_power_state()
2450 pl->sclk, pl->mclk, pl->vddc, pl->vddci); in rv770_dpm_print_power_state()
2487 current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci); in rv770_dpm_debugfs_print_current_performance_level()
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| D | rv770_smc.h | 112 RV770_SMC_VOLTAGE_VALUE vddci; member
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| D | nislands_smc.h | 112 NISLANDS_SMC_VOLTAGE_VALUE vddci; member
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| D | radeon_atombios.c | 2370 u16 *vddc, u16 *vddci, u16 *mvdd) in radeon_atombios_get_default_voltages() argument
2379 *vddci = 0; in radeon_atombios_get_default_voltages()
2389 *vddci = le16_to_cpu(firmware_info->info_22.usBootUpVDDCIVoltage); in radeon_atombios_get_default_voltages()
2402 u16 vddc, vddci, mvdd; in radeon_atombios_parse_pplib_non_clock_info() local
2404 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); in radeon_atombios_parse_pplib_non_clock_info()
2445 rdev->pm.default_vddci = rdev->pm.power_state[state_index].clock_info[0].voltage.vddci; in radeon_atombios_parse_pplib_non_clock_info()
2463 rdev->pm.power_state[state_index].clock_info[j].voltage.vddci = in radeon_atombios_parse_pplib_non_clock_info()
2507 rdev->pm.power_state[state_index].clock_info[mode_index].voltage.vddci = in radeon_atombios_parse_pplib_clock_info()
2520 rdev->pm.power_state[state_index].clock_info[mode_index].voltage.vddci = in radeon_atombios_parse_pplib_clock_info()
3207 u16 *vddc, u16 *vddci, in radeon_atom_get_leakage_vddc_based_on_leakage_params() argument
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| D | rv770_dpm.h | 145 u16 vddci; /* eg+ only */ member
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| D | sislands_smc.h | 157 SISLANDS_SMC_VOLTAGE_VALUE vddci; member
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| D | cypress_dpm.c | 751 pl->vddci, in cypress_convert_power_level_to_smc()
752 &level->vddci); in cypress_convert_power_level_to_smc()
1290 initial_state->low.vddci, in cypress_populate_smc_initial_state()
1291 &table->initialState.levels[0].vddci); in cypress_populate_smc_initial_state()
1387 &table->ACPIState.levels[0].vddci); in cypress_populate_smc_acpi_state()
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| D | ci_dpm.c | 1339 u16 vddc, vddci; in ci_get_leakage_voltages() local
1359 if (radeon_atom_get_leakage_vddc_based_on_leakage_params(rdev, &vddc, &vddci, in ci_get_leakage_voltages()
1367 if (vddci != 0 && vddci != virtual_voltage_id) { in ci_get_leakage_voltages()
1368 pi->vddci_leakage.actual_voltage[pi->vddci_leakage.count] = vddci; in ci_get_leakage_voltages()
4925 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = in ci_set_private_data_variables_based_on_pptable()
4945 static void ci_patch_with_vddci_leakage(struct radeon_device *rdev, u16 *vddci) in ci_patch_with_vddci_leakage() argument
4952 if (leakage_table->leakage_id[leakage_index] == *vddci) { in ci_patch_with_vddci_leakage()
4953 *vddci = leakage_table->actual_voltage[leakage_index]; in ci_patch_with_vddci_leakage()
5019 ci_patch_with_vddci_leakage(rdev, (u16 *)&table->vddci); in ci_patch_clock_voltage_limits_with_vddc_leakage()
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| D | evergreen.c | 1643 if ((voltage->vddci & 0xff00) == 0xff00) in evergreen_pm_misc()
1645 if (voltage->vddci && (voltage->vddci != rdev->pm.current_vddci)) { in evergreen_pm_misc()
1646 radeon_atom_set_voltage(rdev, voltage->vddci, SET_VOLTAGE_TYPE_ASIC_VDDCI); in evergreen_pm_misc()
1647 rdev->pm.current_vddci = voltage->vddci; in evergreen_pm_misc()
1648 DRM_DEBUG("Setting: vddci: %d\n", voltage->vddci); in evergreen_pm_misc()
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| D | radeon_mode.h | 724 u16 *vddc, u16 *vddci, u16 *mvdd);
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| D | radeon.h | 310 u16 *vddc, u16 *vddci,
1285 u16 vddci; member
1391 u16 vddci; member
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| D | rv6xx_dpm.c | 1865 u16 vddc, vddci, mvdd; in rv6xx_parse_pplib_clock_info() local
1866 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); in rv6xx_parse_pplib_clock_info()
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| D | r600_dpm.c | 979 rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddci = in r600_parse_extended_power_table()
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| D | radeon_pm.c | 1233 …rrent_vddci = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].voltage.vddci; in radeon_pm_resume_old()
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| /drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_atombios.h | 179 u16 *vddc, u16 *vddci,
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| D | amdgpu_atombios.c | 1160 u16 *vddc, u16 *vddci, in amdgpu_atombios_get_leakage_vddc_based_on_leakage_params() argument
1172 *vddci = 0; in amdgpu_atombios_get_leakage_vddc_based_on_leakage_params()
1223 *vddci = vddci_buf[j * profile->ucElbVDDCI_Num + i]; in amdgpu_atombios_get_leakage_vddc_based_on_leakage_params()
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| D | ci_dpm.c | 1466 u16 vddc, vddci; in ci_get_leakage_voltages() local
1486 if (amdgpu_atombios_get_leakage_vddc_based_on_leakage_params(adev, &vddc, &vddci, in ci_get_leakage_voltages()
1494 if (vddci != 0 && vddci != virtual_voltage_id) { in ci_get_leakage_voltages()
1495 pi->vddci_leakage.actual_voltage[pi->vddci_leakage.count] = vddci; in ci_get_leakage_voltages()
5093 adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = in ci_set_private_data_variables_based_on_pptable()
5113 static void ci_patch_with_vddci_leakage(struct amdgpu_device *adev, u16 *vddci) in ci_patch_with_vddci_leakage() argument
5120 if (leakage_table->leakage_id[leakage_index] == *vddci) { in ci_patch_with_vddci_leakage()
5121 *vddci = leakage_table->actual_voltage[leakage_index]; in ci_patch_with_vddci_leakage()
5187 ci_patch_with_vddci_leakage(adev, (u16 *)&table->vddci); in ci_patch_clock_voltage_limits_with_vddc_leakage()
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| D | amdgpu_dpm.c | 421 adev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddci = in amdgpu_parse_extended_power_table()
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| D | amdgpu.h | 1415 u16 vddci; member
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