Home
last modified time | relevance | path

Searched refs:vga_render_control (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/radeon/
Dradeon_bios.c252 u32 vga_render_control; in ni_read_disabled_bios() local
259 vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL); in ni_read_disabled_bios()
273 (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK)); in ni_read_disabled_bios()
284 WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control); in ni_read_disabled_bios()
296 uint32_t vga_render_control; in r700_read_disabled_bios() local
306 vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL); in r700_read_disabled_bios()
321 (vga_render_control & ~AVIVO_VGA_VSTATUS_CNTL_MASK)); in r700_read_disabled_bios()
354 WREG32(AVIVO_VGA_RENDER_CONTROL, vga_render_control); in r700_read_disabled_bios()
365 uint32_t vga_render_control; in r600_read_disabled_bios() local
379 vga_render_control = RREG32(AVIVO_VGA_RENDER_CONTROL); in r600_read_disabled_bios()
[all …]
Dradeon_asic.h278 u32 vga_render_control; member
504 u32 vga_render_control; member
Drv515.c301 save->vga_render_control = RREG32(R_000300_VGA_RENDER_CONTROL); in rv515_mc_stop()
465 WREG32(R_000300_VGA_RENDER_CONTROL, save->vga_render_control); in rv515_mc_resume()
Devergreen.c2759 save->vga_render_control = RREG32(VGA_RENDER_CONTROL); in evergreen_mc_stop()
2935 WREG32(VGA_RENDER_CONTROL, save->vga_render_control); in evergreen_mc_resume()
/drivers/gpu/drm/amd/amdgpu/
Dvi.c341 u32 vga_render_control = 0; in vi_read_disabled_bios() local
349 vga_render_control = RREG32(mmVGA_RENDER_CONTROL); in vi_read_disabled_bios()
364 (vga_render_control & ~VGA_RENDER_CONTROL__VGA_VSTATUS_CNTL_MASK)); in vi_read_disabled_bios()
375 WREG32(mmVGA_RENDER_CONTROL, vga_render_control); in vi_read_disabled_bios()
Dcik.c892 u32 vga_render_control = 0; in cik_read_disabled_bios() local
900 vga_render_control = RREG32(mmVGA_RENDER_CONTROL); in cik_read_disabled_bios()
915 (vga_render_control & ~VGA_RENDER_CONTROL__VGA_VSTATUS_CNTL_MASK)); in cik_read_disabled_bios()
926 WREG32(mmVGA_RENDER_CONTROL, vga_render_control); in cik_read_disabled_bios()
Damdgpu_mode.h257 u32 vga_render_control; member
Ddce_v8_0.c543 save->vga_render_control = RREG32(mmVGA_RENDER_CONTROL); in dce_v8_0_stop_mc_access()
662 WREG32(mmVGA_RENDER_CONTROL, save->vga_render_control); in dce_v8_0_resume_mc_access()
Ddce_v10_0.c568 save->vga_render_control = RREG32(mmVGA_RENDER_CONTROL); in dce_v10_0_stop_mc_access()
687 WREG32(mmVGA_RENDER_CONTROL, save->vga_render_control); in dce_v10_0_resume_mc_access()
Ddce_v11_0.c556 save->vga_render_control = RREG32(mmVGA_RENDER_CONTROL); in dce_v11_0_stop_mc_access()
675 WREG32(mmVGA_RENDER_CONTROL, save->vga_render_control); in dce_v11_0_resume_mc_access()