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Searched refs:vm_manager (Results 1 – 18 of 18) sorted by relevance

/drivers/gpu/drm/radeon/
Dradeon_vm.c62 return rdev->vm_manager.max_pfn >> radeon_vm_block_size; in radeon_vm_num_pdes()
89 if (!rdev->vm_manager.enabled) { in radeon_vm_manager_init()
94 rdev->vm_manager.enabled = true; in radeon_vm_manager_init()
110 if (!rdev->vm_manager.enabled) in radeon_vm_manager_fini()
114 radeon_fence_unref(&rdev->vm_manager.active[i]); in radeon_vm_manager_fini()
116 rdev->vm_manager.enabled = false; in radeon_vm_manager_fini()
188 vm_id->last_id_use == rdev->vm_manager.active[vm_id->id]) in radeon_vm_grab_id()
195 for (i = 1; i < rdev->vm_manager.nvm; ++i) { in radeon_vm_grab_id()
196 struct radeon_fence *fence = rdev->vm_manager.active[i]; in radeon_vm_grab_id()
215 return rdev->vm_manager.active[choices[i]]; in radeon_vm_grab_id()
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Dni.c1330 rdev->vm_manager.max_pfn - 1); in cayman_pcie_gart_enable()
1332 rdev->vm_manager.saved_table_addr[i]); in cayman_pcie_gart_enable()
1367 rdev->vm_manager.saved_table_addr[i] = RREG32( in cayman_pcie_gart_disable()
2417 rdev->vm_manager.nvm = 8; in cayman_vm_init()
2422 rdev->vm_manager.vram_base_offset = tmp; in cayman_vm_init()
2424 rdev->vm_manager.vram_base_offset = 0; in cayman_vm_init()
Dradeon_gem.c604 if (!rdev->vm_manager.enabled) { in radeon_gem_va_ioctl()
Dradeon_cs.c352 !p->rdev->vm_manager.enabled) { in radeon_cs_parser_init()
Dsi.c4324 WREG32(VM_CONTEXT1_PAGE_TABLE_END_ADDR, rdev->vm_manager.max_pfn - 1); in si_pcie_gart_enable()
4332 rdev->vm_manager.saved_table_addr[i]); in si_pcie_gart_enable()
4335 rdev->vm_manager.saved_table_addr[i]); in si_pcie_gart_enable()
4375 rdev->vm_manager.saved_table_addr[i] = RREG32(reg); in si_pcie_gart_disable()
4788 rdev->vm_manager.nvm = 16; in si_vm_init()
4790 rdev->vm_manager.vram_base_offset = 0; in si_vm_init()
Dcik.c5868 WREG32(VM_CONTEXT1_PAGE_TABLE_END_ADDR, rdev->vm_manager.max_pfn - 1); in cik_pcie_gart_enable()
5872 rdev->vm_manager.saved_table_addr[i]); in cik_pcie_gart_enable()
5875 rdev->vm_manager.saved_table_addr[i]); in cik_pcie_gart_enable()
5950 rdev->vm_manager.saved_table_addr[i] = RREG32(reg); in cik_pcie_gart_disable()
6023 rdev->vm_manager.nvm = RADEON_NUM_OF_VMIDS; in cik_vm_init()
6028 rdev->vm_manager.vram_base_offset = tmp; in cik_vm_init()
6030 rdev->vm_manager.vram_base_offset = 0; in cik_vm_init()
Dradeon_device.c1355 rdev->vm_manager.max_pfn = radeon_vm_size << 18; in radeon_device_init()
Dradeon.h2435 struct radeon_vm_manager vm_manager; member
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_vm.c62 return adev->vm_manager.max_pfn >> amdgpu_vm_block_size; in amdgpu_vm_num_pdes()
150 owner = atomic_long_read(&adev->vm_manager.ids[id].owner); in amdgpu_vm_grab_id()
161 for (i = 1; i < adev->vm_manager.nvm; ++i) { in amdgpu_vm_grab_id()
162 struct fence *fence = adev->vm_manager.ids[i].active; in amdgpu_vm_grab_id()
184 fence = adev->vm_manager.ids[choices[i]].active; in amdgpu_vm_grab_id()
254 fence_put(adev->vm_manager.ids[vm_id].active); in amdgpu_vm_fence()
255 adev->vm_manager.ids[vm_id].active = fence_get(fence); in amdgpu_vm_fence()
256 atomic_long_set(&adev->vm_manager.ids[vm_id].owner, (long)vm); in amdgpu_vm_fence()
341 struct amdgpu_ring *ring = adev->vm_manager.vm_pte_funcs_ring; in amdgpu_vm_clear_bo()
430 struct amdgpu_ring *ring = adev->vm_manager.vm_pte_funcs_ring; in amdgpu_vm_update_page_directory()
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Dgmc_v8_0.c653 WREG32(mmVM_CONTEXT1_PAGE_TABLE_END_ADDR, adev->vm_manager.max_pfn - 1); in gmc_v8_0_gart_enable()
773 adev->vm_manager.nvm = AMDGPU_NUM_OF_VMIDS; in gmc_v8_0_vm_init()
779 adev->vm_manager.vram_base_offset = tmp; in gmc_v8_0_vm_init()
781 adev->vm_manager.vram_base_offset = 0; in gmc_v8_0_vm_init()
902 adev->vm_manager.max_pfn = amdgpu_vm_size << 18; in gmc_v8_0_sw_init()
948 if (!adev->vm_manager.enabled) { in gmc_v8_0_sw_init()
954 adev->vm_manager.enabled = true; in gmc_v8_0_sw_init()
964 if (adev->vm_manager.enabled) { in gmc_v8_0_sw_fini()
967 adev->vm_manager.enabled = false; in gmc_v8_0_sw_fini()
1014 if (adev->vm_manager.enabled) { in gmc_v8_0_suspend()
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Dgmc_v7_0.c575 WREG32(mmVM_CONTEXT1_PAGE_TABLE_END_ADDR, adev->vm_manager.max_pfn - 1); in gmc_v7_0_gart_enable()
694 adev->vm_manager.nvm = AMDGPU_NUM_OF_VMIDS; in gmc_v7_0_vm_init()
700 adev->vm_manager.vram_base_offset = tmp; in gmc_v7_0_vm_init()
702 adev->vm_manager.vram_base_offset = 0; in gmc_v7_0_vm_init()
942 adev->vm_manager.max_pfn = amdgpu_vm_size << 18; in gmc_v7_0_sw_init()
988 if (!adev->vm_manager.enabled) { in gmc_v7_0_sw_init()
994 adev->vm_manager.enabled = true; in gmc_v7_0_sw_init()
1004 if (adev->vm_manager.enabled) { in gmc_v7_0_sw_fini()
1007 adev->vm_manager.enabled = false; in gmc_v7_0_sw_fini()
1054 if (adev->vm_manager.enabled) { in gmc_v7_0_suspend()
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Dcik_sdma.c1407 if (adev->vm_manager.vm_pte_funcs == NULL) { in cik_sdma_set_vm_pte_funcs()
1408 adev->vm_manager.vm_pte_funcs = &cik_sdma_vm_pte_funcs; in cik_sdma_set_vm_pte_funcs()
1409 adev->vm_manager.vm_pte_funcs_ring = &adev->sdma.instance[0].ring; in cik_sdma_set_vm_pte_funcs()
1410 adev->vm_manager.vm_pte_funcs_ring->is_pte_ring = true; in cik_sdma_set_vm_pte_funcs()
Dsdma_v2_4.c1413 if (adev->vm_manager.vm_pte_funcs == NULL) { in sdma_v2_4_set_vm_pte_funcs()
1414 adev->vm_manager.vm_pte_funcs = &sdma_v2_4_vm_pte_funcs; in sdma_v2_4_set_vm_pte_funcs()
1415 adev->vm_manager.vm_pte_funcs_ring = &adev->sdma.instance[0].ring; in sdma_v2_4_set_vm_pte_funcs()
1416 adev->vm_manager.vm_pte_funcs_ring->is_pte_ring = true; in sdma_v2_4_set_vm_pte_funcs()
Dsdma_v3_0.c1574 if (adev->vm_manager.vm_pte_funcs == NULL) { in sdma_v3_0_set_vm_pte_funcs()
1575 adev->vm_manager.vm_pte_funcs = &sdma_v3_0_vm_pte_funcs; in sdma_v3_0_set_vm_pte_funcs()
1576 adev->vm_manager.vm_pte_funcs_ring = &adev->sdma.instance[0].ring; in sdma_v3_0_set_vm_pte_funcs()
1577 adev->vm_manager.vm_pte_funcs_ring->is_pte_ring = true; in sdma_v3_0_set_vm_pte_funcs()
Damdgpu.h2032 struct amdgpu_vm_manager vm_manager; member
2243 #define amdgpu_vm_copy_pte(adev, ib, pe, src, count) ((adev)->vm_manager.vm_pte_funcs->copy_pte((ib…
2244 #define amdgpu_vm_write_pte(adev, ib, pe, addr, count, incr, flags) ((adev)->vm_manager.vm_pte_func…
2245 #define amdgpu_vm_set_pte_pde(adev, ib, pe, addr, count, incr, flags) ((adev)->vm_manager.vm_pte_fu…
2246 #define amdgpu_vm_pad_ib(adev, ib) ((adev)->vm_manager.vm_pte_funcs->pad_ib((ib)))
Damdgpu_device.c1394 adev->vm_manager.vm_pte_funcs = NULL; in amdgpu_device_init()
1395 adev->vm_manager.vm_pte_funcs_ring = NULL; in amdgpu_device_init()
Damdgpu_gem.c526 if (!adev->vm_manager.enabled) in amdgpu_gem_va_ioctl()
Damdgpu_kms.c462 dev_info.virtual_address_max = (uint64_t)adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE; in amdgpu_info_ioctl()