Searched refs:width_in_mb (Results 1 – 2 of 2) sorted by relevance
386 unsigned width_in_mb = width / 16; in amdgpu_uvd_cs_msg_decode() local388 unsigned fs_in_mb = width_in_mb * height_in_mb; in amdgpu_uvd_cs_msg_decode()434 min_dpb_size += width_in_mb * height_in_mb * num_dpb_buffer * 192; in amdgpu_uvd_cs_msg_decode()437 min_dpb_size += width_in_mb * height_in_mb * 32; in amdgpu_uvd_cs_msg_decode()446 min_dpb_size += width_in_mb * height_in_mb * 128; in amdgpu_uvd_cs_msg_decode()449 min_dpb_size += width_in_mb * 64; in amdgpu_uvd_cs_msg_decode()452 min_dpb_size += width_in_mb * 128; in amdgpu_uvd_cs_msg_decode()455 tmp = max(width_in_mb, height_in_mb); in amdgpu_uvd_cs_msg_decode()471 min_dpb_size += width_in_mb * height_in_mb * 64; in amdgpu_uvd_cs_msg_decode()474 min_dpb_size += ALIGN(width_in_mb * height_in_mb * 32, 64); in amdgpu_uvd_cs_msg_decode()
318 unsigned width_in_mb = width / 16; in radeon_uvd_cs_msg_decode() local334 min_dpb_size += width_in_mb * height_in_mb * 17 * 192; in radeon_uvd_cs_msg_decode()337 min_dpb_size += width_in_mb * height_in_mb * 32; in radeon_uvd_cs_msg_decode()346 min_dpb_size += width_in_mb * height_in_mb * 128; in radeon_uvd_cs_msg_decode()349 min_dpb_size += width_in_mb * 64; in radeon_uvd_cs_msg_decode()352 min_dpb_size += width_in_mb * 128; in radeon_uvd_cs_msg_decode()355 tmp = max(width_in_mb, height_in_mb); in radeon_uvd_cs_msg_decode()371 min_dpb_size += width_in_mb * height_in_mb * 64; in radeon_uvd_cs_msg_decode()374 min_dpb_size += ALIGN(width_in_mb * height_in_mb * 32, 64); in radeon_uvd_cs_msg_decode()