Home
last modified time | relevance | path

Searched defs:val (Results 1 – 25 of 3592) sorted by relevance

12345678910>>...144

/drivers/net/wireless/brcm80211/brcmsmac/
Dtypes.h133 #define CONF_HAS(config, val) ((config) & (1 << (val))) argument
138 #define CONF_IS(config, val) ((config) == (1 << (val))) argument
139 #define CONF_GE(config, val) ((config) & (0-(1 << (val)))) argument
140 #define CONF_GT(config, val) ((config) & (0-2*(1 << (val)))) argument
141 #define CONF_LT(config, val) ((config) & ((1 << (val))-1)) argument
142 #define CONF_LE(config, val) ((config) & (2*(1 << (val))-1)) argument
146 #define NCONF_HAS(val) CONF_HAS(NCONF, val) argument
148 #define NCONF_IS(val) CONF_IS(NCONF, val) argument
149 #define NCONF_GE(val) CONF_GE(NCONF, val) argument
150 #define NCONF_GT(val) CONF_GT(NCONF, val) argument
[all …]
/drivers/net/ethernet/neterion/vxge/
Dvxge-reg.h25 #define vxge_vBIT(val, loc, sz) (((u64)(val)) << (64-(loc)-(sz))) argument
26 #define vxge_vBIT32(val, loc, sz) (((u32)(val)) << (32-(loc)-(sz))) argument
54 #define VXGE_EPROM_IMG_MAJOR(val) (u32) vxge_bVALn(val, 48, 4) argument
55 #define VXGE_EPROM_IMG_MINOR(val) (u32) vxge_bVALn(val, 52, 4) argument
56 #define VXGE_EPROM_IMG_FIX(val) (u32) vxge_bVALn(val, 56, 4) argument
57 #define VXGE_EPROM_IMG_BUILD(val) (u32) vxge_bVALn(val, 60, 4) argument
59 #define VXGE_HW_GET_EPROM_IMAGE_INDEX(val) vxge_bVALn(val, 16, 8) argument
60 #define VXGE_HW_GET_EPROM_IMAGE_VALID(val) vxge_bVALn(val, 31, 1) argument
61 #define VXGE_HW_GET_EPROM_IMAGE_TYPE(val) vxge_bVALn(val, 40, 8) argument
62 #define VXGE_HW_GET_EPROM_IMAGE_REV(val) vxge_bVALn(val, 48, 16) argument
[all …]
/drivers/gpu/drm/msm/adreno/
Da4xx.xml.h283 static inline uint32_t A4XX_CGC_HLSQ_EARLY_CYC(uint32_t val) in A4XX_CGC_HLSQ_EARLY_CYC()
334 static inline uint32_t A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(uint32_t val) in A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH()
340 static inline uint32_t A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(uint32_t val) in A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT()
356 static inline uint32_t A4XX_RB_MODE_CONTROL_WIDTH(uint32_t val) in A4XX_RB_MODE_CONTROL_WIDTH()
362 static inline uint32_t A4XX_RB_MODE_CONTROL_HEIGHT(uint32_t val) in A4XX_RB_MODE_CONTROL_HEIGHT()
375 static inline uint32_t A4XX_RB_MSAA_CONTROL_SAMPLES(uint32_t val) in A4XX_RB_MSAA_CONTROL_SAMPLES()
390 static inline uint32_t A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES(uint32_t val) in A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES()
407 static inline uint32_t A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE(uint32_t val) in A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE()
415 static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT(enum a4xx_color_fmt val) in A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT()
421 static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(enum a4xx_tile_mode val) in A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE()
[all …]
Da3xx.xml.h692 static inline uint32_t A3XX_GRAS_CL_CLIP_CNTL_NUM_USER_CLIP_PLANES(uint32_t val) in A3XX_GRAS_CL_CLIP_CNTL_NUM_USER_CLIP_PLANES()
700 static inline uint32_t A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ(uint32_t val) in A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ()
706 static inline uint32_t A3XX_GRAS_CL_GB_CLIP_ADJ_VERT(uint32_t val) in A3XX_GRAS_CL_GB_CLIP_ADJ_VERT()
714 static inline uint32_t A3XX_GRAS_CL_VPORT_XOFFSET(float val) in A3XX_GRAS_CL_VPORT_XOFFSET()
722 static inline uint32_t A3XX_GRAS_CL_VPORT_XSCALE(float val) in A3XX_GRAS_CL_VPORT_XSCALE()
730 static inline uint32_t A3XX_GRAS_CL_VPORT_YOFFSET(float val) in A3XX_GRAS_CL_VPORT_YOFFSET()
738 static inline uint32_t A3XX_GRAS_CL_VPORT_YSCALE(float val) in A3XX_GRAS_CL_VPORT_YSCALE()
746 static inline uint32_t A3XX_GRAS_CL_VPORT_ZOFFSET(float val) in A3XX_GRAS_CL_VPORT_ZOFFSET()
754 static inline uint32_t A3XX_GRAS_CL_VPORT_ZSCALE(float val) in A3XX_GRAS_CL_VPORT_ZSCALE()
762 static inline uint32_t A3XX_GRAS_SU_POINT_MINMAX_MIN(float val) in A3XX_GRAS_SU_POINT_MINMAX_MIN()
[all …]
Da2xx.xml.h263 static inline uint32_t A2XX_MH_MMU_CONFIG_RB_W_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val) in A2XX_MH_MMU_CONFIG_RB_W_CLNT_BEHAVIOR()
269 static inline uint32_t A2XX_MH_MMU_CONFIG_CP_W_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val) in A2XX_MH_MMU_CONFIG_CP_W_CLNT_BEHAVIOR()
275 static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R0_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val) in A2XX_MH_MMU_CONFIG_CP_R0_CLNT_BEHAVIOR()
281 static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R1_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val) in A2XX_MH_MMU_CONFIG_CP_R1_CLNT_BEHAVIOR()
287 static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R2_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val) in A2XX_MH_MMU_CONFIG_CP_R2_CLNT_BEHAVIOR()
293 static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R3_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val) in A2XX_MH_MMU_CONFIG_CP_R3_CLNT_BEHAVIOR()
299 static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R4_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val) in A2XX_MH_MMU_CONFIG_CP_R4_CLNT_BEHAVIOR()
305 static inline uint32_t A2XX_MH_MMU_CONFIG_VGT_R0_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val) in A2XX_MH_MMU_CONFIG_VGT_R0_CLNT_BEHAVIOR()
311 static inline uint32_t A2XX_MH_MMU_CONFIG_VGT_R1_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val) in A2XX_MH_MMU_CONFIG_VGT_R1_CLNT_BEHAVIOR()
317 static inline uint32_t A2XX_MH_MMU_CONFIG_TC_R_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val) in A2XX_MH_MMU_CONFIG_TC_R_CLNT_BEHAVIOR()
[all …]
Dadreno_pm4.xml.h214 static inline uint32_t CP_LOAD_STATE_0_DST_OFF(uint32_t val) in CP_LOAD_STATE_0_DST_OFF()
220 static inline uint32_t CP_LOAD_STATE_0_STATE_SRC(enum adreno_state_src val) in CP_LOAD_STATE_0_STATE_SRC()
226 static inline uint32_t CP_LOAD_STATE_0_STATE_BLOCK(enum adreno_state_block val) in CP_LOAD_STATE_0_STATE_BLOCK()
232 static inline uint32_t CP_LOAD_STATE_0_NUM_UNIT(uint32_t val) in CP_LOAD_STATE_0_NUM_UNIT()
240 static inline uint32_t CP_LOAD_STATE_1_STATE_TYPE(enum adreno_state_type val) in CP_LOAD_STATE_1_STATE_TYPE()
246 static inline uint32_t CP_LOAD_STATE_1_EXT_SRC_ADDR(uint32_t val) in CP_LOAD_STATE_1_EXT_SRC_ADDR()
254 static inline uint32_t CP_DRAW_INDX_0_VIZ_QUERY(uint32_t val) in CP_DRAW_INDX_0_VIZ_QUERY()
262 static inline uint32_t CP_DRAW_INDX_1_PRIM_TYPE(enum pc_di_primtype val) in CP_DRAW_INDX_1_PRIM_TYPE()
268 static inline uint32_t CP_DRAW_INDX_1_SOURCE_SELECT(enum pc_di_src_sel val) in CP_DRAW_INDX_1_SOURCE_SELECT()
274 static inline uint32_t CP_DRAW_INDX_1_VIS_CULL(enum pc_di_vis_cull_mode val) in CP_DRAW_INDX_1_VIS_CULL()
[all …]
Dadreno_common.xml.h162 static inline uint32_t AXXX_CP_RB_CNTL_BUFSZ(uint32_t val) in AXXX_CP_RB_CNTL_BUFSZ()
168 static inline uint32_t AXXX_CP_RB_CNTL_BLKSZ(uint32_t val) in AXXX_CP_RB_CNTL_BLKSZ()
174 static inline uint32_t AXXX_CP_RB_CNTL_BUF_SWAP(uint32_t val) in AXXX_CP_RB_CNTL_BUF_SWAP()
185 static inline uint32_t AXXX_CP_RB_RPTR_ADDR_SWAP(uint32_t val) in AXXX_CP_RB_RPTR_ADDR_SWAP()
191 static inline uint32_t AXXX_CP_RB_RPTR_ADDR_ADDR(uint32_t val) in AXXX_CP_RB_RPTR_ADDR_ADDR()
209 static inline uint32_t AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB1_START(uint32_t val) in AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB1_START()
215 static inline uint32_t AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB2_START(uint32_t val) in AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB2_START()
221 static inline uint32_t AXXX_CP_QUEUE_THRESHOLDS_CSQ_ST_START(uint32_t val) in AXXX_CP_QUEUE_THRESHOLDS_CSQ_ST_START()
229 static inline uint32_t AXXX_CP_MEQ_THRESHOLDS_MEQ_END(uint32_t val) in AXXX_CP_MEQ_THRESHOLDS_MEQ_END()
235 static inline uint32_t AXXX_CP_MEQ_THRESHOLDS_ROQ_END(uint32_t val) in AXXX_CP_MEQ_THRESHOLDS_ROQ_END()
[all …]
/drivers/gpu/drm/i915/
Dintel_sideband.c43 u32 port, u32 opcode, u32 addr, u32 *val) in vlv_sideband_rw()
80 u32 val = 0; in vlv_punit_read() local
92 void vlv_punit_write(struct drm_i915_private *dev_priv, u32 addr, u32 val) in vlv_punit_write()
104 u32 val = 0; in vlv_bunit_read() local
112 void vlv_bunit_write(struct drm_i915_private *dev_priv, u32 reg, u32 val) in vlv_bunit_write()
120 u32 val = 0; in vlv_nc_read() local
134 u32 val = 0; in vlv_gpio_nc_read() local
140 void vlv_gpio_nc_write(struct drm_i915_private *dev_priv, u32 reg, u32 val) in vlv_gpio_nc_write()
148 u32 val = 0; in vlv_cck_read() local
154 void vlv_cck_write(struct drm_i915_private *dev_priv, u32 reg, u32 val) in vlv_cck_write()
[all …]
/drivers/gpu/drm/msm/mdp/mdp5/
Dmdp5.xml.h176 static inline uint32_t MDSS_HW_VERSION_STEP(uint32_t val) in MDSS_HW_VERSION_STEP()
182 static inline uint32_t MDSS_HW_VERSION_MINOR(uint32_t val) in MDSS_HW_VERSION_MINOR()
188 static inline uint32_t MDSS_HW_VERSION_MAJOR(uint32_t val) in MDSS_HW_VERSION_MAJOR()
212 static inline uint32_t MDP5_MDP_HW_VERSION_STEP(uint32_t val) in MDP5_MDP_HW_VERSION_STEP()
218 static inline uint32_t MDP5_MDP_HW_VERSION_MINOR(uint32_t val) in MDP5_MDP_HW_VERSION_MINOR()
224 static inline uint32_t MDP5_MDP_HW_VERSION_MAJOR(uint32_t val) in MDP5_MDP_HW_VERSION_MAJOR()
232 static inline uint32_t MDP5_MDP_DISP_INTF_SEL_INTF0(enum mdp5_intf_type val) in MDP5_MDP_DISP_INTF_SEL_INTF0()
238 static inline uint32_t MDP5_MDP_DISP_INTF_SEL_INTF1(enum mdp5_intf_type val) in MDP5_MDP_DISP_INTF_SEL_INTF1()
244 static inline uint32_t MDP5_MDP_DISP_INTF_SEL_INTF2(enum mdp5_intf_type val) in MDP5_MDP_DISP_INTF_SEL_INTF2()
250 static inline uint32_t MDP5_MDP_DISP_INTF_SEL_INTF3(enum mdp5_intf_type val) in MDP5_MDP_DISP_INTF_SEL_INTF3()
[all …]
/drivers/gpu/drm/msm/mdp/mdp4/
Dmdp4.xml.h112 static inline uint32_t MDP4_VERSION_MINOR(uint32_t val) in MDP4_VERSION_MINOR()
118 static inline uint32_t MDP4_VERSION_MAJOR(uint32_t val) in MDP4_VERSION_MAJOR()
140 static inline uint32_t MDP4_DISP_INTF_SEL_PRIM(enum mdp4_intf val) in MDP4_DISP_INTF_SEL_PRIM()
146 static inline uint32_t MDP4_DISP_INTF_SEL_SEC(enum mdp4_intf val) in MDP4_DISP_INTF_SEL_SEC()
152 static inline uint32_t MDP4_DISP_INTF_SEL_EXT(enum mdp4_intf val) in MDP4_DISP_INTF_SEL_EXT()
182 static inline uint32_t MDP4_LAYERMIXER2_IN_CFG_PIPE0(enum mdp_mixer_stage_id val) in MDP4_LAYERMIXER2_IN_CFG_PIPE0()
189 static inline uint32_t MDP4_LAYERMIXER2_IN_CFG_PIPE1(enum mdp_mixer_stage_id val) in MDP4_LAYERMIXER2_IN_CFG_PIPE1()
196 static inline uint32_t MDP4_LAYERMIXER2_IN_CFG_PIPE2(enum mdp_mixer_stage_id val) in MDP4_LAYERMIXER2_IN_CFG_PIPE2()
203 static inline uint32_t MDP4_LAYERMIXER2_IN_CFG_PIPE3(enum mdp_mixer_stage_id val) in MDP4_LAYERMIXER2_IN_CFG_PIPE3()
210 static inline uint32_t MDP4_LAYERMIXER2_IN_CFG_PIPE4(enum mdp_mixer_stage_id val) in MDP4_LAYERMIXER2_IN_CFG_PIPE4()
[all …]
/drivers/hwtracing/coresight/
Dcoresight-etm4x.c319 unsigned long val; in nr_pe_cmp_show() local
331 unsigned long val; in nr_addr_cmp_show() local
343 unsigned long val; in nr_cntr_show() local
355 unsigned long val; in nr_ext_inp_show() local
367 unsigned long val; in numcidc_show() local
379 unsigned long val; in numvmidc_show() local
391 unsigned long val; in nrseqstate_show() local
403 unsigned long val; in nr_resource_show() local
415 unsigned long val; in nr_ss_cmp_show() local
428 unsigned long val; in reset_store() local
[all …]
Dcoresight-etm3x.c46 u32 val, u32 off) in etm_writel()
60 u32 val; in etm_readl() local
153 u32 val; in coresight_timeout_etm() local
436 unsigned long val; in nr_addr_cmp_show() local
446 { unsigned long val; in nr_cntr_show() local
457 unsigned long val; in nr_ctxid_cmp_show() local
468 unsigned long flags, val; in etmsr_show() local
490 unsigned long val; in reset_store() local
522 unsigned long val; in mode_show() local
534 unsigned long val; in mode_store() local
[all …]
/drivers/power/
Dpm2301_charger.c129 static int pm2xxx_reg_read(struct pm2xxx_charger *pm2, int reg, u8 *val) in pm2xxx_reg_read()
148 static int pm2xxx_reg_write(struct pm2xxx_charger *pm2, int reg, u8 val) in pm2xxx_reg_write()
200 static int pm2xxx_charger_batt_therm_mngt(struct pm2xxx_charger *pm2, int val) in pm2xxx_charger_batt_therm_mngt()
208 static int pm2xxx_charger_die_therm_mngt(struct pm2xxx_charger *pm2, int val) in pm2xxx_charger_die_therm_mngt()
215 static int pm2xxx_charger_ovv_mngt(struct pm2xxx_charger *pm2, int val) in pm2xxx_charger_ovv_mngt()
227 static int pm2xxx_charger_wd_exp_mngt(struct pm2xxx_charger *pm2, int val) in pm2xxx_charger_wd_exp_mngt()
237 static int pm2xxx_charger_vbat_lsig_mngt(struct pm2xxx_charger *pm2, int val) in pm2xxx_charger_vbat_lsig_mngt()
271 static int pm2xxx_charger_bat_disc_mngt(struct pm2xxx_charger *pm2, int val) in pm2xxx_charger_bat_disc_mngt()
278 static int pm2xxx_charger_detection(struct pm2xxx_charger *pm2, u8 *val) in pm2xxx_charger_detection()
295 static int pm2xxx_charger_itv_pwr_plug_mngt(struct pm2xxx_charger *pm2, int val) in pm2xxx_charger_itv_pwr_plug_mngt()
[all …]
/drivers/net/irda/
Dvia-ircc.h160 #define GetBit(val,bit) val = (unsigned char) ((val>>bit) & 0x1) argument
162 #define SetBit(val,bit) val= (unsigned char ) (val | (0x1 << bit)) argument
164 #define ResetBit(val,bit) val= (unsigned char ) (val & ~(0x1 << bit)) argument
318 #define CRC16(BaseAddr,val) WriteRegBit(BaseAddr,I_CF_L_0,7,val) //0 for 32 CRC argument
325 #define SIRFilter(BaseAddr,val) WriteRegBit(BaseAddr,I_CF_L_0,3,val) argument
326 #define Filter(BaseAddr,val) WriteRegBit(BaseAddr,I_CF_L_0,2,val) argument
327 #define InvertTX(BaseAddr,val) WriteRegBit(BaseAddr,I_CF_L_0,1,val) argument
328 #define InvertRX(BaseAddr,val) WriteRegBit(BaseAddr,I_CF_L_0,0,val) argument
330 #define EnableTX(BaseAddr,val) WriteRegBit(BaseAddr,I_CF_H_0,4,val) argument
331 #define EnableRX(BaseAddr,val) WriteRegBit(BaseAddr,I_CF_H_0,3,val) argument
[all …]
/drivers/gpu/drm/msm/dsi/
Ddsi.xml.h112 static inline uint32_t DSI_6G_HW_VERSION_MAJOR(uint32_t val) in DSI_6G_HW_VERSION_MAJOR()
118 static inline uint32_t DSI_6G_HW_VERSION_MINOR(uint32_t val) in DSI_6G_HW_VERSION_MINOR()
124 static inline uint32_t DSI_6G_HW_VERSION_STEP(uint32_t val) in DSI_6G_HW_VERSION_STEP()
155 static inline uint32_t DSI_VID_CFG0_VIRT_CHANNEL(uint32_t val) in DSI_VID_CFG0_VIRT_CHANNEL()
161 static inline uint32_t DSI_VID_CFG0_DST_FORMAT(enum dsi_vid_dst_format val) in DSI_VID_CFG0_DST_FORMAT()
167 static inline uint32_t DSI_VID_CFG0_TRAFFIC_MODE(enum dsi_traffic_mode val) in DSI_VID_CFG0_TRAFFIC_MODE()
184 static inline uint32_t DSI_VID_CFG1_RGB_SWAP(enum dsi_rgb_swap val) in DSI_VID_CFG1_RGB_SWAP()
192 static inline uint32_t DSI_ACTIVE_H_START(uint32_t val) in DSI_ACTIVE_H_START()
198 static inline uint32_t DSI_ACTIVE_H_END(uint32_t val) in DSI_ACTIVE_H_END()
206 static inline uint32_t DSI_ACTIVE_V_START(uint32_t val) in DSI_ACTIVE_V_START()
[all …]
/drivers/media/pci/cx18/
Dcx18-io.h44 void cx18_raw_writel_noretry(struct cx18 *cx, u32 val, void __iomem *addr) in cx18_raw_writel_noretry()
49 static inline void cx18_raw_writel(struct cx18 *cx, u32 val, void __iomem *addr) in cx18_raw_writel()
66 void cx18_writel_noretry(struct cx18 *cx, u32 val, void __iomem *addr) in cx18_writel_noretry()
71 static inline void cx18_writel(struct cx18 *cx, u32 val, void __iomem *addr) in cx18_writel()
82 void cx18_writel_expect(struct cx18 *cx, u32 val, void __iomem *addr, in cx18_writel_expect()
104 void cx18_writew_noretry(struct cx18 *cx, u16 val, void __iomem *addr) in cx18_writew_noretry()
109 static inline void cx18_writew(struct cx18 *cx, u16 val, void __iomem *addr) in cx18_writew()
125 void cx18_writeb_noretry(struct cx18 *cx, u8 val, void __iomem *addr) in cx18_writeb_noretry()
130 static inline void cx18_writeb(struct cx18 *cx, u8 val, void __iomem *addr) in cx18_writeb()
151 static inline void cx18_write_reg_noretry(struct cx18 *cx, u32 val, u32 reg) in cx18_write_reg_noretry()
[all …]
Dcx18-io.c27 void cx18_memset_io(struct cx18 *cx, void __iomem *addr, int val, size_t count) in cx18_memset_io()
58 void cx18_sw1_irq_enable(struct cx18 *cx, u32 val) in cx18_sw1_irq_enable()
65 void cx18_sw1_irq_disable(struct cx18 *cx, u32 val) in cx18_sw1_irq_disable()
71 void cx18_sw2_irq_enable(struct cx18 *cx, u32 val) in cx18_sw2_irq_enable()
78 void cx18_sw2_irq_disable(struct cx18 *cx, u32 val) in cx18_sw2_irq_disable()
84 void cx18_sw2_irq_disable_cpu(struct cx18 *cx, u32 val) in cx18_sw2_irq_disable_cpu()
93 u32 val; in cx18_setup_page() local
/drivers/staging/media/davinci_vpfe/
Ddm365_ipipe_hw.c40 u32 val; in rsz_set_common_params() local
76 u32 val; in rsz_set_rsz_regs() local
321 u32 val; in rsz_set_y_address() local
336 u32 val; in rsz_set_c_address() local
362 unsigned int val; in resizer_set_outaddr() local
419 u32 val; in ipipe_set_lutdpc_regs() local
475 u32 val; in ipipe_set_otfdpc_regs() local
532 u32 val; in ipipe_set_d2f_regs() local
576 u32 val; in ipipe_set_gic_regs() local
614 u32 val; in ipipe_set_wb_regs() local
[all …]
/drivers/media/dvb-frontends/
Dlg2160.c67 static int lg216x_write_reg(struct lg216x_state *state, u16 reg, u8 val) in lg216x_write_reg()
91 static int lg216x_read_reg(struct lg216x_state *state, u16 reg, u8 *val) in lg216x_read_reg()
119 u8 val; member
140 u8 val; in lg216x_set_reg_bit() local
252 u8 val; in lg216x_set_if() local
277 u8 val; in lg2160_agc_fix() local
319 u8 val; in lg2160_agc_polarity() local
339 u8 val; in lg2160_tuner_pwr_save_polarity() local
358 u8 val; in lg2160_spectrum_polarity() local
376 u8 val; in lg2160_tuner_pwr_save() local
[all …]
/drivers/clocksource/
Dmtk_timer.c31 #define GPT_IRQ_ENABLE(val) BIT((val) - 1) argument
33 #define GPT_IRQ_ACK(val) BIT((val) - 1) argument
35 #define TIMER_CTRL_REG(val) (0x10 * (val)) argument
36 #define TIMER_CTRL_OP(val) (((val) & 0x3) << 4) argument
44 #define TIMER_CLK_REG(val) (0x04 + (0x10 * (val))) argument
45 #define TIMER_CLK_SRC(val) (((val) & 0x1) << 4) argument
51 #define TIMER_CNT_REG(val) (0x08 + (0x10 * (val))) argument
52 #define TIMER_CMP_REG(val) (0x0C + (0x10 * (val))) argument
78 u32 val; in mtk_clkevt_time_stop() local
94 u32 val; in mtk_clkevt_time_start() local
[all …]
Dsun4i_timer.c28 #define TIMER_IRQ_EN(val) BIT(val) argument
30 #define TIMER_CTL_REG(val) (0x10 * val + 0x10) argument
33 #define TIMER_CTL_CLK_SRC(val) (((val) & 0x3) << 2) argument
35 #define TIMER_CTL_CLK_PRES(val) (((val) & 0x7) << 4) argument
37 #define TIMER_INTVAL_REG(val) (0x10 * (val) + 0x14) argument
38 #define TIMER_CNTVAL_REG(val) (0x10 * (val) + 0x18) argument
61 u32 val = readl(timer_base + TIMER_CTL_REG(timer)); in sun4i_clkevt_time_stop() local
73 u32 val = readl(timer_base + TIMER_CTL_REG(timer)); in sun4i_clkevt_time_start() local
158 u32 val; in sun4i_timer_init() local
/drivers/media/platform/exynos4-is/
Dfimc-is-param.c323 void __is_set_isp_awb(struct fimc_is *is, u32 cmd, u32 val) in __is_set_isp_awb()
350 void __is_set_isp_iso(struct fimc_is *is, u32 cmd, u32 val) in __is_set_isp_iso()
364 void __is_set_isp_adjust(struct fimc_is *is, u32 cmd, u32 val) in __is_set_isp_adjust()
411 void __is_set_isp_metering(struct fimc_is *is, u32 id, u32 val) in __is_set_isp_metering()
446 void __is_set_isp_afc(struct fimc_is *is, u32 cmd, u32 val) in __is_set_isp_afc()
460 void __is_set_drc_control(struct fimc_is *is, u32 val) in __is_set_drc_control()
472 void __is_set_fd_control(struct fimc_is *is, u32 val) in __is_set_fd_control()
487 void __is_set_fd_config_maxface(struct fimc_is *is, u32 val) in __is_set_fd_config_maxface()
507 void __is_set_fd_config_rollangle(struct fimc_is *is, u32 val) in __is_set_fd_config_rollangle()
527 void __is_set_fd_config_yawangle(struct fimc_is *is, u32 val) in __is_set_fd_config_yawangle()
[all …]
/drivers/tty/serial/
Dbcm63xx_uart.c97 unsigned int val; in bcm_uart_tx_empty() local
108 unsigned int val; in bcm_uart_set_mctrl() local
132 unsigned int val, mctrl; in bcm_uart_get_mctrl() local
152 unsigned int val; in bcm_uart_stop_tx() local
168 unsigned int val; in bcm_uart_start_tx() local
184 unsigned int val; in bcm_uart_stop_rx() local
196 unsigned int val; in bcm_uart_enable_ms() local
209 unsigned int val; in bcm_uart_break_ctl() local
252 unsigned int val; in bcm_uart_do_rx() local
316 unsigned int val, max_count; in bcm_uart_do_tx() local
[all …]
/drivers/base/regmap/
Dregmap.c159 unsigned int reg, unsigned int val) in regmap_format_2_6_write()
167 unsigned int reg, unsigned int val) in regmap_format_4_12_write()
174 unsigned int reg, unsigned int val) in regmap_format_7_9_write()
181 unsigned int reg, unsigned int val) in regmap_format_10_14_write()
190 static void regmap_format_8(void *buf, unsigned int val, unsigned int shift) in regmap_format_8()
197 static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift) in regmap_format_16_be()
204 static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift) in regmap_format_16_le()
211 static void regmap_format_16_native(void *buf, unsigned int val, in regmap_format_16_native()
217 static void regmap_format_24(void *buf, unsigned int val, unsigned int shift) in regmap_format_24()
228 static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift) in regmap_format_32_be()
[all …]
/drivers/input/mouse/
Delan_i2c_i2c.c68 u16 reg, u8 *val, u16 len) in elan_i2c_read_block()
93 static int elan_i2c_read_cmd(struct i2c_client *client, u16 reg, u8 *val) in elan_i2c_read_cmd()
136 u8 val[256]; in elan_i2c_initialize() local
179 u8 val[2]; in elan_i2c_power_control() local
219 static int elan_i2c_calibrate_result(struct i2c_client *client, u8 *val) in elan_i2c_calibrate_result()
228 u8 val[3]; in elan_i2c_get_baseline_data() local
246 u8 val[3]; in elan_i2c_get_version() local
266 u8 val[3]; in elan_i2c_get_sm_version() local
282 u8 val[3]; in elan_i2c_get_product_id() local
298 u8 val[3]; in elan_i2c_get_checksum() local
[all …]

12345678910>>...144