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Searched refs:CAN0_MBIM1 (Results 1 – 4 of 4) sorted by relevance

/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h1052 #define CAN0_MBIM1 0xffc02a28 /* CAN Controller 0 Mailbox Interrupt Mask R… macro
DcdefBF54x_base.h1812 #define bfin_read_CAN0_MBIM1() bfin_read16(CAN0_MBIM1)
1813 #define bfin_write_CAN0_MBIM1(val) bfin_write16(CAN0_MBIM1, val)
/arch/blackfin/mach-bf609/include/mach/
DdefBF60x_base.h86 #define CAN0_MBIM1 0xFFC00A28 /* CAN0 Mailbox Interrupt Mask Register 1 */ macro
DcdefBF60x_base.h2446 #define bfin_read_CAN0_MBIM1() bfin_read16(CAN0_MBIM1)
2447 #define bfin_write_CAN0_MBIM1(val) bfin_write16(CAN0_MBIM1, val)