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Searched refs:CLASS0_INTR_MASK (Results 1 – 3 of 3) sorted by relevance

/arch/powerpc/platforms/cell/spufs/
Dfault.c79 unsigned long stat = ctx->csa.class_0_pending & CLASS0_INTR_MASK; in spufs_handle_class0()
Dswitch.c769 spu_int_stat_clear(spu, 0, CLASS0_INTR_MASK); in enable_interrupts()
928 spu_int_stat_clear(spu, 0, CLASS0_INTR_MASK); in wait_tag_complete()
947 spu_int_stat_clear(spu, 0, CLASS0_INTR_MASK); in wait_spu_stopped()
1424 spu_int_stat_clear(spu, 0, CLASS0_INTR_MASK); in clear_interrupts()
/arch/powerpc/include/asm/
Dspu.h532 #define CLASS0_INTR_MASK 0x7L macro