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Searched refs:CVMX_CIU_PP_RST (Results 1 – 2 of 2) sorted by relevance

/arch/mips/cavium-octeon/
Dsmp.c286 cvmx_write_csr(CVMX_CIU_PP_RST, 1 << coreid); in octeon_cpu_die()
287 cvmx_write_csr(CVMX_CIU_PP_RST, 0); in octeon_cpu_die()
336 cvmx_write_csr(CVMX_CIU_PP_RST, 1 << coreid); in octeon_update_boot_vector()
337 cvmx_write_csr(CVMX_CIU_PP_RST, 0); in octeon_update_boot_vector()
/arch/mips/include/asm/octeon/
Dcvmx-ciu-defs.h150 #define CVMX_CIU_PP_RST (CVMX_ADD_IO_SEG(0x0001070000000700ull)) macro