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Searched refs:DMA2_6_IRQ_STATUS (Results 1 – 2 of 2) sorted by relevance

/arch/blackfin/mach-bf561/include/mach/
DdefBF561.h634 #define DMA2_6_IRQ_STATUS 0xFFC00DA8 /* DMA2 Channel 6 Interrupt/Status Register */ macro
DcdefBF561.h1123 #define bfin_read_DMA2_6_IRQ_STATUS() bfin_read16(DMA2_6_IRQ_STATUS)
1124 #define bfin_write_DMA2_6_IRQ_STATUS(val) bfin_write16(DMA2_6_IRQ_STATUS,val)