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Searched refs:EBIU_DDRGC3 (Results 1 – 3 of 3) sorted by relevance

/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h196 #define EBIU_DDRGC3 0xffc00abc /* DDR Grant Count 3 Register */ macro
DcdefBF54x_base.h293 #define bfin_read_EBIU_DDRGC3() bfin_read32(EBIU_DDRGC3)
294 #define bfin_write_EBIU_DDRGC3(val) bfin_write32(EBIU_DDRGC3, val)
/arch/blackfin/kernel/
Ddebug-mmrs.c930 D32(EBIU_DDRGC3); in bfin_debug_mmrs_init()