Searched refs:OFF (Results 1 – 12 of 12) sorted by relevance
/arch/arm64/kernel/ |
D | hw_breakpoint.c | 70 #define READ_WB_REG_CASE(OFF, N, REG, VAL) \ argument 71 case (OFF + N): \ 75 #define WRITE_WB_REG_CASE(OFF, N, REG, VAL) \ argument 76 case (OFF + N): \ 80 #define GEN_READ_WB_REG_CASES(OFF, REG, VAL) \ argument 81 READ_WB_REG_CASE(OFF, 0, REG, VAL); \ 82 READ_WB_REG_CASE(OFF, 1, REG, VAL); \ 83 READ_WB_REG_CASE(OFF, 2, REG, VAL); \ 84 READ_WB_REG_CASE(OFF, 3, REG, VAL); \ 85 READ_WB_REG_CASE(OFF, 4, REG, VAL); \ [all …]
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/arch/mn10300/include/asm/ |
D | cache.h | 45 #define ICACHE_DATA(WAY, ENTRY, OFF) \ argument 47 (ENTRY) * L1_CACHE_BYTES + (OFF) * 4, u32) 53 #define DCACHE_DATA(WAY, ENTRY, OFF) \ argument 55 (ENTRY) * L1_CACHE_BYTES + (OFF) * 4, u32)
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/arch/powerpc/kernel/ |
D | eeh_pe.c | 765 #define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF)) argument 766 #define SAVED_BYTE(OFF) (((u8 *)(edev->config_space))[BYTE_SWAP(OFF)]) argument
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/arch/sparc/net/ |
D | bpf_jit_comp.c | 243 #define emit_ldmem(OFF, DEST) \ argument 244 do { *prog++ = LD32I | RS1(SP) | S13(BIAS - (OFF)) | RD(DEST); \ 247 #define emit_stmem(OFF, SRC) \ argument 248 do { *prog++ = ST32I | RS1(SP) | S13(BIAS - (OFF)) | RD(SRC); \ 289 #define emit_branch_off(BR_OPC, OFF) \ argument 290 do { *prog++ = BR_OPC | WDISP22(OFF); \
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/arch/arm/mach-omap2/ |
D | sleep34xx.S | 366 cmp r4, #0x0 @ Check if previous power state of CORE is OFF 386 cmp r2, #0x0 @ Check if previous power state of CORE is OFF 404 cmp r2, #0x0 @ Check if target power state was OFF or RET
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/arch/arm/mach-omap1/ |
D | board-osk.c | 219 tps65010_set_led(LED2, OFF); in osk_tps_setup()
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/arch/m32r/kernel/ |
D | head.S | 210 st r5, @r4 ; Set MATM Reg(T bit OFF)
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/arch/m32r/platforms/mappi/ |
D | dot.gdbinit.nommu | 41 # LED OFF
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D | dot.gdbinit | 41 # LED OFF
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D | dot.gdbinit.smp | 104 # LED OFF
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/arch/arm/boot/dts/ |
D | am335x-bone-common.dtsi | 293 * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
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D | dra72-evm.dts | 495 * SW5.9 (GPMC_WPN) = OFF (HIGH)
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