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Searched refs:P1_IRST_HARD_TXRX (Results 1 – 1 of 1) sorted by relevance

/arch/mips/netlogic/xlp/
Dahci-init-xlp2.c110 #define P1_IRST_HARD_TXRX BIT(25) /* PHY lane hard reset */ macro
272 sata_clear_glue_reg(regbase, SATA_CTL, P1_IRST_HARD_TXRX); in nlm_sata_firmware_init()
301 sata_set_glue_reg(regbase, SATA_CTL, P1_IRST_HARD_TXRX); in nlm_sata_firmware_init()