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Searched refs:PMCAT_CLR0 (Results 1 – 1 of 1) sorted by relevance

/arch/sh/kernel/cpu/sh4a/
Dperf_event.c54 #define PMCAT_CLR0 (1 << 1) macro
250 tmp |= idx ? PMCAT_CLR1 : PMCAT_CLR0; in sh4a_pmu_enable()