Home
last modified time | relevance | path

Searched refs:clkctrl_offs (Results 1 – 13 of 13) sorted by relevance

/arch/arm/mach-omap2/
Dcm33xx.c83 static u32 _clkctrl_idlest(u16 inst, u16 clkctrl_offs) in _clkctrl_idlest() argument
85 u32 v = am33xx_cm_read_reg(inst, clkctrl_offs); in _clkctrl_idlest()
99 static bool _is_module_ready(u16 inst, u16 clkctrl_offs) in _is_module_ready() argument
103 v = _clkctrl_idlest(inst, clkctrl_offs); in _is_module_ready()
218 static int am33xx_cm_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs, in am33xx_cm_wait_module_ready() argument
223 omap_test_timeout(_is_module_ready(inst, clkctrl_offs), in am33xx_cm_wait_module_ready()
241 static int am33xx_cm_wait_module_idle(u8 part, s16 inst, u16 clkctrl_offs, in am33xx_cm_wait_module_idle() argument
246 if (!clkctrl_offs) in am33xx_cm_wait_module_idle()
249 omap_test_timeout((_clkctrl_idlest(inst, clkctrl_offs) == in am33xx_cm_wait_module_idle()
266 u16 clkctrl_offs) in am33xx_cm_module_enable() argument
[all …]
Domap_hwmod_7xx_data.c66 .clkctrl_offs = DRA7XX_CM_EMIF_DMM_CLKCTRL_OFFSET,
87 .clkctrl_offs = DRA7XX_CM_L3INSTR_L3_INSTR_CLKCTRL_OFFSET,
101 .clkctrl_offs = DRA7XX_CM_L3MAIN1_L3_MAIN_1_CLKCTRL_OFFSET,
114 .clkctrl_offs = DRA7XX_CM_L3INSTR_L3_MAIN_2_CLKCTRL_OFFSET,
136 .clkctrl_offs = DRA7XX_CM_L4CFG_L4_CFG_CLKCTRL_OFFSET,
149 .clkctrl_offs = DRA7XX_CM_L4PER_L4_PER1_CLKCTRL_OFFSET,
162 .clkctrl_offs = DRA7XX_CM_L4PER2_L4_PER2_CLKCTRL_OFFSET,
175 .clkctrl_offs = DRA7XX_CM_L4PER3_L4_PER3_CLKCTRL_OFFSET,
188 .clkctrl_offs = DRA7XX_CM_WKUPAON_L4_WKUP_CLKCTRL_OFFSET,
211 .clkctrl_offs = DRA7XX_CM_ATL_ATL_CLKCTRL_OFFSET,
[all …]
Domap_hwmod_43xx_data.c35 .clkctrl_offs = AM43XX_CM_PER_EMIF_CLKCTRL_OFFSET,
49 .clkctrl_offs = AM43XX_CM_PER_L4HS_CLKCTRL_OFFSET,
68 .clkctrl_offs = AM43XX_CM_WKUP_WKUP_M3_CLKCTRL_OFFSET,
86 .clkctrl_offs = AM43XX_CM_WKUP_CONTROL_CLKCTRL_OFFSET,
104 .clkctrl_offs = AM43XX_CM_WKUP_GPIO0_CLKCTRL_OFFSET,
134 .clkctrl_offs = AM43XX_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET,
147 .clkctrl_offs = AM43XX_CM_PER_TIMER8_CLKCTRL_OFFSET,
160 .clkctrl_offs = AM43XX_CM_PER_TIMER9_CLKCTRL_OFFSET,
173 .clkctrl_offs = AM43XX_CM_PER_TIMER10_CLKCTRL_OFFSET,
186 .clkctrl_offs = AM43XX_CM_PER_TIMER11_CLKCTRL_OFFSET,
[all …]
Domap_hwmod_54xx_data.c65 .clkctrl_offs = OMAP54XX_CM_EMIF_DMM_CLKCTRL_OFFSET,
86 .clkctrl_offs = OMAP54XX_CM_L3INSTR_L3_INSTR_CLKCTRL_OFFSET,
100 .clkctrl_offs = OMAP54XX_CM_L3MAIN1_L3_MAIN_1_CLKCTRL_OFFSET,
113 .clkctrl_offs = OMAP54XX_CM_L3MAIN2_L3_MAIN_2_CLKCTRL_OFFSET,
126 .clkctrl_offs = OMAP54XX_CM_L3INSTR_L3_MAIN_3_CLKCTRL_OFFSET,
148 .clkctrl_offs = OMAP54XX_CM_ABE_L4_ABE_CLKCTRL_OFFSET,
161 .clkctrl_offs = OMAP54XX_CM_L4CFG_L4_CFG_CLKCTRL_OFFSET,
174 .clkctrl_offs = OMAP54XX_CM_L4PER_L4_PER_CLKCTRL_OFFSET,
187 .clkctrl_offs = OMAP54XX_CM_WKUPAON_L4_WKUP_CLKCTRL_OFFSET,
240 .clkctrl_offs = OMAP54XX_CM_WKUPAON_COUNTER_32K_CLKCTRL_OFFSET,
[all …]
Dcminst44xx.c87 static u32 _clkctrl_idlest(u8 part, u16 inst, u16 clkctrl_offs) in _clkctrl_idlest() argument
89 u32 v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs); in _clkctrl_idlest()
104 static bool _is_module_ready(u8 part, u16 inst, u16 clkctrl_offs) in _is_module_ready() argument
108 v = _clkctrl_idlest(part, inst, clkctrl_offs); in _is_module_ready()
276 static int omap4_cminst_wait_module_ready(u8 part, s16 inst, u16 clkctrl_offs, in omap4_cminst_wait_module_ready() argument
281 if (!clkctrl_offs) in omap4_cminst_wait_module_ready()
284 omap_test_timeout(_is_module_ready(part, inst, clkctrl_offs), in omap4_cminst_wait_module_ready()
302 static int omap4_cminst_wait_module_idle(u8 part, s16 inst, u16 clkctrl_offs, in omap4_cminst_wait_module_idle() argument
307 if (!clkctrl_offs) in omap4_cminst_wait_module_idle()
310 omap_test_timeout((_clkctrl_idlest(part, inst, clkctrl_offs) == in omap4_cminst_wait_module_idle()
[all …]
Domap_hwmod_44xx_data.c70 .clkctrl_offs = OMAP4_CM_MEMIF_DMM_CLKCTRL_OFFSET,
91 .clkctrl_offs = OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_OFFSET,
105 .clkctrl_offs = OMAP4_CM_L3_1_L3_1_CLKCTRL_OFFSET,
118 .clkctrl_offs = OMAP4_CM_L3_2_L3_2_CLKCTRL_OFFSET,
131 .clkctrl_offs = OMAP4_CM_L3INSTR_L3_3_CLKCTRL_OFFSET,
153 .clkctrl_offs = OMAP4_CM1_ABE_L4ABE_CLKCTRL_OFFSET,
168 .clkctrl_offs = OMAP4_CM_L4CFG_L4_CFG_CLKCTRL_OFFSET,
181 .clkctrl_offs = OMAP4_CM_L4PER_L4PER_CLKCTRL_OFFSET,
194 .clkctrl_offs = OMAP4_CM_WKUP_L4WKUP_CLKCTRL_OFFSET,
235 .clkctrl_offs = OMAP4_CM_L3INSTR_OCP_WP1_CLKCTRL_OFFSET,
[all …]
Domap_hwmod_81xx_data.c185 .clkctrl_offs = DM814X_CM_ALWON_MPU_CLKCTRL,
212 .clkctrl_offs = DM816X_CM_ALWON_MPU_CLKCTRL,
255 .clkctrl_offs = DM81XX_CM_ALWON_UART_0_CLKCTRL,
276 .clkctrl_offs = DM81XX_CM_ALWON_UART_1_CLKCTRL,
297 .clkctrl_offs = DM81XX_CM_ALWON_UART_2_CLKCTRL,
335 .clkctrl_offs = DM81XX_CM_ALWON_WDTIMER_CLKCTRL,
372 .clkctrl_offs = DM81XX_CM_ALWON_I2C_0_CLKCTRL,
392 .clkctrl_offs = DM81XX_CM_ALWON_I2C_1_CLKCTRL,
469 .clkctrl_offs = DM81XX_CM_ALWON_GPIO_0_CLKCTRL,
495 .clkctrl_offs = DM81XX_CM_ALWON_GPIO_1_CLKCTRL,
[all …]
Dcm.h59 void (*module_enable)(u8 mode, u8 part, u16 inst, u16 clkctrl_offs);
60 void (*module_disable)(u8 part, u16 inst, u16 clkctrl_offs);
69 int omap_cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs);
70 int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs);
Domap_hwmod_33xx_data.c46 .clkctrl_offs = AM33XX_CM_PER_EMIF_CLKCTRL_OFFSET,
61 .clkctrl_offs = AM33XX_CM_PER_L4HS_CLKCTRL_OFFSET,
81 .clkctrl_offs = AM33XX_CM_WKUP_WKUP_M3_CLKCTRL_OFFSET,
116 .clkctrl_offs = AM33XX_CM_WKUP_ADC_TSC_CLKCTRL_OFFSET,
149 .clkctrl_offs = AM33XX_CM_CEFUSE_CEFUSE_CLKCTRL_OFFSET,
169 .clkctrl_offs = AM33XX_CM_PER_CLKDIV32K_CLKCTRL_OFFSET,
187 .clkctrl_offs = AM33XX_CM_PER_OCPWP_CLKCTRL_OFFSET,
214 .clkctrl_offs = AM33XX_CM_WKUP_DEBUGSS_CLKCTRL_OFFSET,
230 .clkctrl_offs = AM33XX_CM_WKUP_CONTROL_CLKCTRL_OFFSET,
249 .clkctrl_offs = AM33XX_CM_WKUP_GPIO0_CLKCTRL_OFFSET,
[all …]
Dcm_common.c144 int omap_cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs) in omap_cm_module_enable() argument
152 cm_ll_data->module_enable(mode, part, inst, clkctrl_offs); in omap_cm_module_enable()
166 int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs) in omap_cm_module_disable() argument
174 cm_ll_data->module_disable(part, inst, clkctrl_offs); in omap_cm_module_disable()
Domap_hwmod.h467 u16 clkctrl_offs; member
Domap_hwmod.c1009 oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs); in _omap4_enable_module()
1034 oh->prcm.omap4.clkctrl_offs, 0); in _omap4_wait_target_disable()
1839 oh->prcm.omap4.clkctrl_offs); in _omap4_disable_module()
2957 oh->prcm.omap4.clkctrl_offs, 0); in _omap4_wait_target_ready()
Domap_hwmod_33xx_43xx_ipblock_data.c29 #define CLKCTRL(oh, clkctrl) ((oh).prcm.omap4.clkctrl_offs = (clkctrl))