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Searched refs:icucr (Results 1 – 9 of 9) sorted by relevance

/arch/m32r/platforms/m32700ut/
Dsetup.c34 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; in disable_m32700ut_irq()
43 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; in enable_m32700ut_irq()
81 unsigned short icucr; /* ICU Control Register */ member
93 data = pld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7; in disable_m32700ut_pld_irq()
104 data = pld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6; in enable_m32700ut_pld_irq()
153 data = lanpld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7; in disable_m32700ut_lanpld_irq()
164 data = lanpld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6; in enable_m32700ut_lanpld_irq()
213 data = lcdpld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7; in disable_m32700ut_lcdpld_irq()
224 data = lcdpld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6; in enable_m32700ut_lcdpld_irq()
263 …lanpld_icu_data[irq2lanpldirq(M32700UT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "… in init_IRQ()
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/arch/m32r/platforms/opsput/
Dsetup.c35 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; in disable_opsput_irq()
44 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; in enable_opsput_irq()
82 unsigned short icucr; /* ICU Control Register */ member
94 data = pld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7; in disable_opsput_pld_irq()
105 data = pld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6; in enable_opsput_pld_irq()
154 data = lanpld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7; in disable_opsput_lanpld_irq()
165 data = lanpld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6; in enable_opsput_lanpld_irq()
214 data = lcdpld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7; in disable_opsput_lcdpld_irq()
225 data = lcdpld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6; in enable_opsput_lcdpld_irq()
263 …lanpld_icu_data[irq2lanpldirq(OPSPUT_LAN_IRQ_LAN)].icucr = PLD_ICUCR_IEN|PLD_ICUCR_ISMOD02; /* "H"… in init_IRQ()
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/arch/m32r/platforms/usrv/
Dsetup.c26 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; in disable_mappi_irq()
35 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; in enable_mappi_irq()
73 unsigned short icucr; /* ICU Control Register */ member
85 data = pld_icu_data[pldirq].icucr|PLD_ICUCR_ILEVEL7; in disable_m32700ut_pld_irq()
96 data = pld_icu_data[pldirq].icucr|PLD_ICUCR_IEN|PLD_ICUCR_ILEVEL6; in enable_m32700ut_pld_irq()
142 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; in init_IRQ()
149 icu_data[M32R_IRQ_SIO0_R].icucr = 0; in init_IRQ()
155 icu_data[M32R_IRQ_SIO0_S].icucr = 0; in init_IRQ()
161 icu_data[M32R_IRQ_SIO1_R].icucr = 0; in init_IRQ()
167 icu_data[M32R_IRQ_SIO1_S].icucr = 0; in init_IRQ()
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/arch/m32r/platforms/mappi2/
Dsetup.c31 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; in disable_mappi2_irq()
44 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; in enable_mappi2_irq()
80 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; in init_IRQ()
87 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; in init_IRQ()
94 icu_data[M32R_IRQ_SIO0_R].icucr = 0; in init_IRQ()
100 icu_data[M32R_IRQ_SIO0_S].icucr = 0; in init_IRQ()
105 icu_data[M32R_IRQ_SIO1_R].icucr = 0; in init_IRQ()
111 icu_data[M32R_IRQ_SIO1_S].icucr = 0; in init_IRQ()
119 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01; in init_IRQ()
126 icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01; in init_IRQ()
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/arch/m32r/platforms/oaks32r/
Dsetup.c26 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; in disable_oaks32r_irq()
35 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; in enable_oaks32r_irq()
78 icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; in init_IRQ()
85 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; in init_IRQ()
92 icu_data[M32R_IRQ_SIO0_R].icucr = 0; in init_IRQ()
98 icu_data[M32R_IRQ_SIO0_S].icucr = 0; in init_IRQ()
104 icu_data[M32R_IRQ_SIO1_R].icucr = 0; in init_IRQ()
110 icu_data[M32R_IRQ_SIO1_S].icucr = 0; in init_IRQ()
/arch/m32r/platforms/mappi3/
Dsetup.c31 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; in disable_mappi3_irq()
44 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; in enable_mappi3_irq()
79 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10; in init_IRQ()
86 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; in init_IRQ()
93 icu_data[M32R_IRQ_SIO0_R].icucr = 0; in init_IRQ()
99 icu_data[M32R_IRQ_SIO0_S].icucr = 0; in init_IRQ()
104 icu_data[M32R_IRQ_SIO1_R].icucr = 0; in init_IRQ()
110 icu_data[M32R_IRQ_SIO1_S].icucr = 0; in init_IRQ()
118 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01; in init_IRQ()
125 icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01; in init_IRQ()
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/arch/m32r/platforms/mappi/
Dsetup.c27 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; in disable_mappi_irq()
36 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; in enable_mappi_irq()
79 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD11; in init_IRQ()
86 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; in init_IRQ()
93 icu_data[M32R_IRQ_SIO0_R].icucr = 0; in init_IRQ()
99 icu_data[M32R_IRQ_SIO0_S].icucr = 0; in init_IRQ()
105 icu_data[M32R_IRQ_SIO1_R].icucr = 0; in init_IRQ()
111 icu_data[M32R_IRQ_SIO1_S].icucr = 0; in init_IRQ()
119 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; in init_IRQ()
125 icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00; in init_IRQ()
/arch/m32r/platforms/m32104ut/
Dsetup.c28 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; in disable_m32104ut_irq()
37 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; in enable_m32104ut_irq()
81 cu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD11; in init_IRQ()
88 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN; in init_IRQ()
95 icu_data[M32R_IRQ_SIO0_R].icucr = M32R_ICUCR_IEN; in init_IRQ()
101 icu_data[M32R_IRQ_SIO0_S].icucr = M32R_ICUCR_IEN; in init_IRQ()
/arch/m32r/include/asm/
Dm32102.h310 unsigned long icucr; /* ICU Control Register */ member