/arch/x86/include/asm/ |
D | cmpxchg.h | 164 #define __xadd(ptr, inc, lock) __xchg_op((ptr), (inc), xadd, lock) argument 165 #define xadd(ptr, inc) __xadd((ptr), (inc), LOCK_PREFIX) argument 166 #define xadd_sync(ptr, inc) __xadd((ptr), (inc), "lock; ") argument 167 #define xadd_local(ptr, inc) __xadd((ptr), (inc), "") argument 169 #define __add(ptr, inc, lock) \ argument 171 __typeof__ (*(ptr)) __ret = (inc); \ 175 : "+m" (*(ptr)) : "qi" (inc) \ 180 : "+m" (*(ptr)) : "ri" (inc) \ 185 : "+m" (*(ptr)) : "ri" (inc) \ 190 : "+m" (*(ptr)) : "ri" (inc) \ [all …]
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D | spinlock.h | 108 register struct __raw_tickets inc = { .tail = TICKET_LOCK_INC }; in arch_spin_lock() local 110 inc = xadd(&lock->tickets, inc); in arch_spin_lock() 111 if (likely(inc.head == inc.tail)) in arch_spin_lock() 118 inc.head = READ_ONCE(lock->tickets.head); in arch_spin_lock() 119 if (__tickets_equal(inc.head, inc.tail)) in arch_spin_lock() 123 __ticket_lock_spinning(lock, inc.tail); in arch_spin_lock() 126 __ticket_check_and_clear_slowpath(lock, inc.head); in arch_spin_lock()
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D | xor.h | 115 : [inc] XOR_CONSTANT_CONSTRAINT (256UL) in xor_sse_2() 149 : [inc] XOR_CONSTANT_CONSTRAINT (256UL) in xor_sse_2_pf64() 208 : [inc] XOR_CONSTANT_CONSTRAINT (256UL) in xor_sse_3() 245 : [inc] XOR_CONSTANT_CONSTRAINT (256UL) in xor_sse_3_pf64() 311 : [inc] XOR_CONSTANT_CONSTRAINT (256UL) in xor_sse_4() 350 : [inc] XOR_CONSTANT_CONSTRAINT (256UL) in xor_sse_4_pf64() 423 : [inc] XOR_CONSTANT_CONSTRAINT (256UL) in xor_sse_5() 464 : [inc] XOR_CONSTANT_CONSTRAINT (256UL) in xor_sse_5_pf64()
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D | asm.h | 32 #define _ASM_INC __ASM_SIZE(inc)
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/arch/cris/ |
D | Makefile | 26 inc := -Iarch/cris/include/uapi/$(SARCH) macro 27 inc += -Iarch/cris/include/$(SARCH) 28 inc += -Iarch/cris/include/uapi/$(SARCH)/arch 29 inc += -Iarch/cris/include/$(SARCH)/arch 32 inc := macro 37 inc += -Iarch/cris/include/$(SARCH)/$(MACH)/ 38 inc += -Iarch/cris/include/$(SARCH)/$(MACH)/mach 51 KBUILD_AFLAGS += -mlinux -march=$(arch-y) $(inc) 52 KBUILD_CFLAGS += -mlinux -march=$(arch-y) -pipe $(inc) 53 KBUILD_CPPFLAGS += $(inc)
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/arch/unicore32/include/asm/ |
D | assembler.h | 100 .macro usracc, instr, reg, ptr, inc, cond, rept, abort 104 .if \inc == 1 105 \instr\()b.u \reg, [\ptr], #\inc 106 .elseif \inc == 4 107 \instr\()w.u \reg, [\ptr], #\inc 119 .macro strusr, reg, ptr, inc, cond = al, rept = 1, abort = 9001f 120 usracc st, \reg, \ptr, \inc, \cond, \rept, \abort 123 .macro ldrusr, reg, ptr, inc, cond = al, rept = 1, abort = 9001f 124 usracc ld, \reg, \ptr, \inc, \cond, \rept, \abort
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/arch/mips/include/asm/ |
D | spinlock.h | 66 int inc = 0x10000; in arch_spin_lock() local 101 : [inc] "r" (inc)); in arch_spin_lock() 134 : [inc] "r" (inc)); in arch_spin_lock() 151 int inc = 0x10000; in arch_spin_trylock() local 176 : [inc] "r" (inc)); in arch_spin_trylock() 200 : [inc] "r" (inc)); in arch_spin_trylock()
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/arch/sparc/lib/ |
D | memscan_64.S | 63 inc %g2 68 inc %g2 72 inc %g2 80 inc %g2 85 inc %g2 89 inc %g2 94 inc %g2 97 inc %g2
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/arch/mips/cavium-octeon/ |
D | csrc-octeon.c | 140 u64 cur, end, inc; in __udelay() local 144 inc = us * octeon_udelay_factor; in __udelay() 145 end = cur + inc; in __udelay() 154 u64 cur, end, inc; in __ndelay() local 158 inc = ((ns * octeon_ndelay_factor) >> 16); in __ndelay() 159 end = cur + inc; in __ndelay()
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D | setup.c | 892 u64 inc = addr - *mem; in memory_exclude_page() local 893 add_memory_region(*mem, inc, BOOT_MEM_RAM); in memory_exclude_page() 894 *mem += inc; in memory_exclude_page() 895 *size -= inc; in memory_exclude_page()
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/arch/arm/include/asm/ |
D | assembler.h | 368 .macro usraccoff, instr, reg, ptr, inc, off, cond, abort, t=TUSER() 370 .if \inc == 1 372 .elseif \inc == 4 384 .macro usracc, instr, reg, ptr, inc, cond, rept, abort 398 usraccoff \instr, \reg, \ptr, \inc, 0, \cond, \abort 400 usraccoff \instr, \reg, \ptr, \inc, \inc, \cond, \abort 403 add\cond \ptr, #\rept * \inc 408 .macro usracc, instr, reg, ptr, inc, cond, rept, abort, t=TUSER() 411 .if \inc == 1 412 \instr\cond\()b\()\t \reg, [\ptr], #\inc [all …]
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/arch/ia64/include/uapi/asm/ |
D | gcc_intrin.h | 233 #define ia64_fetchadd4_acq(p, inc) \ argument 238 : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \ 244 #define ia64_fetchadd4_rel(p, inc) \ argument 248 : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \ 254 #define ia64_fetchadd8_acq(p, inc) \ argument 259 : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \ 265 #define ia64_fetchadd8_rel(p, inc) \ argument 269 : "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
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/arch/frv/include/asm/ |
D | checksum.h | 57 unsigned int tmp, inc, sum = 0; in ip_fast_csum() local 75 : "=r" (sum), "=r" (iph), "=r" (ihl), "=r" (inc), "=&r"(tmp) in ip_fast_csum()
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/arch/xtensa/kernel/ |
D | signal.c | 85 int inc = 0; in flush_window_regs_user() local 90 inc = 1; in flush_window_regs_user() 96 inc = 2; in flush_window_regs_user() 102 inc = 3; in flush_window_regs_user() 107 sp = regs->areg[((base + inc) * 4 + 1) % XCHAL_NUM_AREGS]; in flush_window_regs_user() 114 base += inc; in flush_window_regs_user()
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/arch/mn10300/kernel/ |
D | head.S | 62 inc a0 150 inc a3 152 inc a0 162 inc a3 164 inc a0
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D | mn10300-watchdog-low.S | 61 inc d1 define
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/arch/h8300/lib/ |
D | strncpy.S | 22 inc.l #1,er3
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/arch/mn10300/mm/ |
D | misalignment.c | 322 unsigned long data, *store, *postinc, disp, inc, sp; in misalignment() local 487 inc = datasz = 4; in misalignment() 489 inc = datasz = 2; in misalignment() 497 &address, &postinc, &inc)) in misalignment() 508 kdebug("inc=%lx", inc); in misalignment() 509 *postinc += inc; in misalignment() 522 &address, &postinc, &inc)) in misalignment() 531 *postinc += inc; in misalignment()
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/arch/hexagon/lib/ |
D | memcpy.S | 176 #define inc R15:14 /* inc kernel by -1 and defetch ptr by 32 */ macro 362 inc = combine(#32, #-1); define 385 ptr_in_p_128kernel = vaddw(ptr_in_p_128kernel, inc); 421 ptr_in_p_128kernel = vaddw(ptr_in_p_128kernel, inc);
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/arch/frv/kernel/ |
D | head.inc | 1 /* head.inc: head common definitions -*- asm -*-
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/arch/mips/kernel/ |
D | signal.c | 76 int inc = test_thread_flag(TIF_32BIT_FPREGS) ? 2 : 1; in copy_fp_to_sigcontext() local 78 for (i = 0; i < NUM_FPU_REGS; i += inc) { in copy_fp_to_sigcontext() 95 int inc = test_thread_flag(TIF_32BIT_FPREGS) ? 2 : 1; in copy_fp_from_sigcontext() local 98 for (i = 0; i < NUM_FPU_REGS; i += inc) { in copy_fp_from_sigcontext()
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/arch/m32r/kernel/ |
D | head.S | 87 addi r2, #-4 ; account for pre-inc store 95 addi r2, #4 ; account for pre-inc store
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/arch/mn10300/lib/ |
D | memset.S | 114 inc a0
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/arch/um/kernel/ |
D | tlb.c | 191 #define ADD_ROUND(n, inc) (((n) + (inc)) & ~((inc) - 1)) argument
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/arch/sparc/mm/ |
D | viking.S | 58 inc %o2 81 8: inc %o1
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