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Searched refs:mis_ena_reg (Results 1 – 1 of 1) sorted by relevance

/arch/mips/pci/
Dmsi-octeon.c265 static u64 mis_ena_reg[4]; variable
276 en = cvmx_read_csr(mis_ena_reg[irq_index]); in octeon_irq_msi_enable_pcie()
278 cvmx_write_csr(mis_ena_reg[irq_index], en); in octeon_irq_msi_enable_pcie()
279 cvmx_read_csr(mis_ena_reg[irq_index]); in octeon_irq_msi_enable_pcie()
292 en = cvmx_read_csr(mis_ena_reg[irq_index]); in octeon_irq_msi_disable_pcie()
294 cvmx_write_csr(mis_ena_reg[irq_index], en); in octeon_irq_msi_disable_pcie()
295 cvmx_read_csr(mis_ena_reg[irq_index]); in octeon_irq_msi_disable_pcie()
379 mis_ena_reg[0] = CVMX_PEXP_NPEI_MSI_ENB0; in octeon_msi_initialize()
380 mis_ena_reg[1] = CVMX_PEXP_NPEI_MSI_ENB1; in octeon_msi_initialize()
381 mis_ena_reg[2] = CVMX_PEXP_NPEI_MSI_ENB2; in octeon_msi_initialize()
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