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Searched refs:mmr_base (Results 1 – 6 of 6) sorted by relevance

/arch/ia64/uv/kernel/
Dsetup.c67 unsigned long mmr_base, lowmem_redir_base, lowmem_redir_size; in uv_setup() local
75 mmr_base = 0; in uv_setup()
89 mmr_base = in uv_setup()
96 printk(KERN_DEBUG "UV: global MMR base 0x%lx\n", mmr_base); in uv_setup()
111 uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base; in uv_setup()
/arch/arm/include/asm/hardware/
Diop3xx-adma.h26 #define DMA_CCR(chan) (chan->mmr_base + 0x0)
27 #define DMA_CSR(chan) (chan->mmr_base + 0x4)
28 #define DMA_DAR(chan) (chan->mmr_base + 0xc)
29 #define DMA_NDAR(chan) (chan->mmr_base + 0x10)
30 #define DMA_PADR(chan) (chan->mmr_base + 0x14)
31 #define DMA_PUADR(chan) (chan->mmr_base + 0x18)
32 #define DMA_LADR(chan) (chan->mmr_base + 0x1c)
33 #define DMA_BCR(chan) (chan->mmr_base + 0x20)
34 #define DMA_DCR(chan) (chan->mmr_base + 0x24)
37 #define AAU_ACR(chan) (chan->mmr_base + 0x0)
[all …]
Diop_adma.h65 void __iomem *mmr_base; member
/arch/arm/mach-iop13xx/include/mach/
Dadma.h25 #define ADMA_ACCR(chan) (chan->mmr_base + 0x0)
26 #define ADMA_ACSR(chan) (chan->mmr_base + 0x4)
27 #define ADMA_ADAR(chan) (chan->mmr_base + 0x8)
28 #define ADMA_IIPCR(chan) (chan->mmr_base + 0x18)
29 #define ADMA_IIPAR(chan) (chan->mmr_base + 0x1c)
30 #define ADMA_IIPUAR(chan) (chan->mmr_base + 0x20)
31 #define ADMA_ANDAR(chan) (chan->mmr_base + 0x24)
32 #define ADMA_ADCR(chan) (chan->mmr_base + 0x28)
33 #define ADMA_CARMD(chan) (chan->mmr_base + 0x2c)
34 #define ADMA_ABCR(chan) (chan->mmr_base + 0x30)
[all …]
/arch/ia64/sn/pci/
Dtioce_provider.c58 u64 mmr_base; in tioce_mmr_war_pre() local
64 mmr_base = kern->ce_common->ce_pcibus.bs_base; in tioce_mmr_war_pre()
65 mmr_offset = (unsigned long)mmr_addr - mmr_base; in tioce_mmr_war_pre()
77 readq_relaxed((void __iomem *)(mmr_base + mmr_war_offset)); in tioce_mmr_war_pre()
84 u64 mmr_base; in tioce_mmr_war_post() local
90 mmr_base = kern->ce_common->ce_pcibus.bs_base; in tioce_mmr_war_post()
91 mmr_offset = (unsigned long)mmr_addr - mmr_base; in tioce_mmr_war_post()
95 readq_relaxed((void __iomem *)(mmr_base + 0x38)); in tioce_mmr_war_post()
96 readq_relaxed((void __iomem *)(mmr_base + 0xb050)); in tioce_mmr_war_post()
/arch/x86/kernel/apic/
Dx2apic_uv_x.c879 unsigned long mmr_base, present, paddr; in uv_system_init() local
898 mmr_base = in uv_system_init()
909 pr_info("UV: global MMR base 0x%lx\n", mmr_base); in uv_system_init()
994 uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base; in uv_system_init()