Searched refs:operands (Results 1 – 20 of 20) sorted by relevance
/arch/powerpc/xmon/ |
D | ppc.h | 50 unsigned char operands[8]; member 306 unsigned int operands; member
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D | ppc-dis.c | 80 for (opindex = opcode->operands; *opindex != 0; opindex++) in print_insn_powerpc() 91 if (opcode->operands[0] != 0) in print_insn_powerpc() 97 for (opindex = opcode->operands; *opindex != 0; opindex++) in print_insn_powerpc()
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/arch/m68k/fpsp040/ |
D | do_func.S | 171 bra t_operr |take care of operands < -1 189 bne t_operr |take care of operands < 0 203 bra t_operr |take care of operands < 0 211 bne t_operr |take care of operands < 0 225 bra t_operr |take care of operands < 0 233 bne t_operr |take care of operands < 0 247 bra t_operr |take care of operands < 0
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D | res_func.S | 605 | of the operands must be denormalized to enter this code. 650 | if(both operands are denorm) 664 | if(both operands are denorm) 824 | Check the signs of the operands. If they are unlike, the fpu 999 | Check the signs of the operands. If they are alike, the fpu
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D | decbin.S | 21 | and NaN operands are dispatched without entering this routine)
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/arch/tile/kernel/ |
D | backtrace.c | 132 int operands[MAX_INFO_OPS_PER_BUNDLE]) in bt_get_info_ops() 143 operands[num_ops++] = insn->operand_values[0]; in bt_get_info_ops() 176 if (insn->operands[j]->is_dest_reg && in bt_modifies_reg()
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D | tile-desc_64.c | 2194 &tilegx_operands[opc->operands[pipe][i]]; in parse_insn_tilegx() 2212 d->operands[i] = op; in parse_insn_tilegx()
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D | tile-desc_32.c | 2582 &tilepro_operands[opc->operands[pipe][i]]; in parse_insn_tilepro() 2599 d->operands[i] = op; in parse_insn_tilepro()
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/arch/tile/include/asm/ |
D | tile-desc_64.h | 460 unsigned char operands[TILEGX_NUM_PIPELINE_ENCODINGS][TILEGX_MAX_OPERANDS]; member 470 const struct tilegx_operand *operands[TILEGX_MAX_OPERANDS]; member
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D | tile-desc_32.h | 522 unsigned char operands[TILEPRO_NUM_PIPELINE_ENCODINGS][TILEPRO_MAX_OPERANDS]; member 533 const struct tilepro_operand *operands[TILEPRO_MAX_OPERANDS]; member
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/arch/m68k/ifpsp060/ |
D | fplsp.doc | 101 addq.l &0x8,%sp # clear operands from stack 103 Again, the result is returned in fp0. Note that BOTH operands
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/arch/m68k/ifpsp060/src/ |
D | ilsp.S | 84 # If the operands are signed, make them unsigned and save the # 545 # load temp registers with operands 603 # one or both of the operands is zero so the result is also zero. 671 # load temp registers with operands
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D | fpsp.S | 2298 # have to make sure that for single or double source operands that the 2374 # set_tag_x() - determine optype of src/dst operands # 2376 # unnorm_fix() - change UNNORM operands to NORM or ZERO # 2948 # immediate operands but requires some extra work for fmovm dynamic 13951 # compute a result. Check if the regular operands would have taken # 14292 # compute a result. Check if the regular operands would have taken # 14608 # addsub_scaler2() - scale the operands so they won't take exc # 14958 # both operands are ZEROes 15018 # both operands are INFs. an OPERR will result if the INFs have 15031 # operands are INF and one of {ZERO, INF, DENORM, NORM} [all …]
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D | pfpsp.S | 2297 # have to make sure that for single or double source operands that the 2373 # set_tag_x() - determine optype of src/dst operands # 2375 # unnorm_fix() - change UNNORM operands to NORM or ZERO # 2947 # immediate operands but requires some extra work for fmovm dynamic
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D | fplsp.S | 9349 # The input operands X and Y can be either normalized or #
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/arch/x86/math-emu/ |
D | README | 113 (a) the operands have a higher precision than the current setting of the 119 operands were rounded to the current precision before the arithmetic 277 for operands close to pi/2. Measured results are (note that the
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/arch/arc/ |
D | Kconfig | 396 dest operands with 2 possible source operands.
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/arch/s390/kernel/ |
D | dis.c | 163 static const struct s390_operand operands[] = variable 1913 operand = operands + *ops; in print_insn()
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/arch/x86/lib/ |
D | x86-opcode-map.txt | 341 # NOTE: According to Intel SDM opcode map, vmovups and vmovupd has no operands 342 # but it actually has operands. And also, vmovss and vmovsd only accept 128bit.
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/arch/x86/crypto/ |
D | aesni-intel_asm.S | 768 # XMM8 and TMP5 hold the values for the two operands 976 # XMM8 and TMP5 hold the values for the two operands
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