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Searched refs:unfl (Results 1 – 25 of 26) sorted by relevance

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/arch/parisc/math-emu/
Dsfsub.c209 Sgl_setwrapped_exponent(left,result_exponent,unfl); in sgl_fsub()
259 Sgl_setwrapped_exponent(result,result_exponent,unfl); in sgl_fsub()
422 Sgl_setwrapped_exponent(result,result_exponent,unfl); in sgl_fsub()
Dsfadd.c208 Sgl_setwrapped_exponent(left,result_exponent,unfl); in sgl_fadd()
257 Sgl_setwrapped_exponent(result,result_exponent,unfl); in sgl_fadd()
419 Sgl_setwrapped_exponent(result,result_exponent,unfl); in sgl_fadd()
Ddfadd.c208 Dbl_setwrapped_exponent(leftp1,result_exponent,unfl); in dbl_fadd()
260 Dbl_setwrapped_exponent(resultp1,result_exponent,unfl); in dbl_fadd()
424 Dbl_setwrapped_exponent(resultp1,result_exponent,unfl); in dbl_fadd()
Ddfsub.c211 Dbl_setwrapped_exponent(leftp1,result_exponent,unfl); in dbl_fsub()
263 Dbl_setwrapped_exponent(resultp1,result_exponent,unfl); in dbl_fsub()
427 Dbl_setwrapped_exponent(resultp1,result_exponent,unfl); in dbl_fsub()
Dfmpyfadd.c321 unfl); in dbl_fmpyfadd()
363 unfl); in dbl_fmpyfadd()
696 Dbl_setwrapped_exponent(resultp1,result_exponent,unfl); in dbl_fmpyfadd()
981 unfl);
1023 unfl);
1354 Dbl_setwrapped_exponent(resultp1,result_exponent,unfl);
1637 unfl);
1679 unfl);
1995 Sgl_setwrapped_exponent(resultp1,result_exponent,unfl);
2279 unfl);
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Dsfrem.c272 Sgl_setwrapped_exponent(result,dest_exponent,unfl); in sgl_frem()
Dfcnvff.c286 Sgl_setwrapped_exponent(result,dest_exponent,unfl); in dbl_to_sgl_fcnvff()
Ddfrem.c278 Dbl_setwrapped_exponent(resultp1,dest_exponent,unfl); in dbl_frem()
Dsfmpy.c300 Sgl_setwrapped_exponent(result,dest_exponent,unfl); in sgl_fmpy()
Dsfdiv.c313 Sgl_setwrapped_exponent(result,dest_exponent,unfl); in sgl_fdiv()
Ddfmpy.c314 Dbl_setwrapped_exponent(resultp1,dest_exponent,unfl); in dbl_fmpy()
Ddfdiv.c319 Dbl_setwrapped_exponent(resultp1,dest_exponent,unfl); in dbl_fdiv()
Dsgl_float.h194 #define unfl + macro
Ddbl_float.h317 #define unfl + macro
/arch/m68k/fpsp040/
Dskeleton.S89 | bug, if an E1 snan, ovfl, or unfl occurred, and the process was
92 | and unfl exception to be taken must not have been enabled. The
94 | or unfl bits set in the fpsr. If any of these are set, branch
124 btstb #unfl_bit,2(%sp) |test for unfl
129 bra unfl
201 .global unfl symbol
202 unfl: label
Dscale.S63 | and set unfl.
132 orl #unfl_bit,USER_FPSR(%a6) |set unfl
168 blt fix_unfl |if lower, catastrophic unfl
186 | ;set unfl, aunfl, ainex
Dkernel_ex.S130 | This entry point is used by all routines requiring unfl, inex2,
Dgen_except.S19 | unfl
360 bfextu USER_FPSR(%a6){#17:#4},%d0 |get snan/operr/ovfl/unfl bits
Dx_unfl.S81 | unfl. If the inex enable bit is set in the FPCR, and either
Dres_func.S527 | Simply set unfl (not inex2 or aunfl) and write the result to
1445 | set if the result is inex and unfl is signalled.
1459 | that gen_except will have a correctly signed value for ovfl/unfl
1477 | that gen_except will have a correctly signed value for ovfl/unfl
Dbugfix.S170 | nu-generated ovfl, unfl, or inex exception. If the version
/arch/m68k/ifpsp060/
DTEST.DOC145 0x10: FP enabled snan/operr/ovfl/unfl/dz/inex
159 FP enabled: tests enabled snan/operr/ovfl/unfl/dz/inex.
162 exercises _fpsp_{snan,operr,ovfl,unfl,dz,inex}() and
163 _real_{snan,operr,ovfl,unfl,dz,inex}(). the test expects
/arch/m68k/ifpsp060/src/
Dfpsp.S967 # funfl_{unfl,inex}_on() because w/ both exceptions disabled, this
1674 # for snan,operr,ovfl,unfl, src op is still in FP_SRC so just
10206 # unfl enabled #
11774 bset &unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
13493 bset &unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
13595 bset &unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
13989 cmpi.l %d0,&0x3fff+0x0001 # would result unfl?
13990 beq.w fsglmul_may_unfl # result may rnd to no unfl
14423 bset &unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit
14717 long 0x0000 # ext unfl
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Dftest.S125 ### unfl non-maskable
199 ### unfl
Dpfpsp.S966 # funfl_{unfl,inex}_on() because w/ both exceptions disabled, this
1673 # for snan,operr,ovfl,unfl, src op is still in FP_SRC so just

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