Searched refs:dstate (Results 1 – 4 of 4) sorted by relevance
| /drivers/gpu/drm/nouveau/nvkm/subdev/clk/ |
| D | base.c | 216 clk->astate, clk->tstate, clk->dstate); in nvkm_pstate_work()
222 pstate = max(pstate, clk->dstate); in nvkm_pstate_work()
458 if (!rel) clk->dstate = req; in nvkm_clk_dstate()
459 if ( rel) clk->dstate += rel; in nvkm_clk_dstate()
460 clk->dstate = min(clk->dstate, clk->state_nr - 1); in nvkm_clk_dstate()
461 clk->dstate = max(clk->dstate, 0); in nvkm_clk_dstate()
523 clk->dstate = 0; in nvkm_clk_init()
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| /drivers/gpu/drm/nouveau/include/nvkm/subdev/ |
| D | clk.h | 94 int dstate; /* display adjustment (min+) */ member
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| /drivers/staging/rts5208/ |
| D | rtsx_chip.c | 2024 static void rtsx_handle_pm_dstate(struct rtsx_chip *chip, u8 dstate) in rtsx_handle_pm_dstate() argument
2029 chip->product_id, dstate); in rtsx_handle_pm_dstate()
2042 rtsx_write_cfg_dw(chip, func_no, 0x84, 0xFF, dstate); in rtsx_handle_pm_dstate()
2045 rtsx_write_config_byte(chip, 0x44, dstate); in rtsx_handle_pm_dstate()
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| /drivers/gpu/drm/i915/ |
| D | intel_pm.c | 7155 u32 dstate = I915_READ(D_STATE); in gen3_init_clock_gating() local
7157 dstate |= DSTATE_PLL_D3_OFF | DSTATE_GFX_CLOCK_GATING | in gen3_init_clock_gating()
7159 I915_WRITE(D_STATE, dstate); in gen3_init_clock_gating()
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