| /drivers/video/fbdev/geode/ |
| D | video_cs5530.c | 141 int blank, hsync, vsync; in cs5530_blank_display() local
145 blank = 0; hsync = 1; vsync = 1; in cs5530_blank_display()
148 blank = 1; hsync = 1; vsync = 1; in cs5530_blank_display()
151 blank = 1; hsync = 1; vsync = 0; in cs5530_blank_display()
154 blank = 1; hsync = 0; vsync = 1; in cs5530_blank_display()
157 blank = 1; hsync = 0; vsync = 0; in cs5530_blank_display()
172 if (hsync) in cs5530_blank_display()
180 if (hsync && vsync) in cs5530_blank_display()
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| D | video_gx.c | 302 int blank, hsync, vsync, crt; in gx_blank_display() local
307 blank = 0; hsync = 1; vsync = 1; crt = 1; in gx_blank_display()
310 blank = 1; hsync = 1; vsync = 1; crt = 1; in gx_blank_display()
313 blank = 1; hsync = 1; vsync = 0; crt = 1; in gx_blank_display()
316 blank = 1; hsync = 0; vsync = 1; crt = 1; in gx_blank_display()
319 blank = 1; hsync = 0; vsync = 0; crt = 0; in gx_blank_display()
329 if (hsync) in gx_blank_display()
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| D | lxfb_ops.c | 529 int blank, hsync, vsync; in lx_blank_display() local
534 blank = 0; hsync = 1; vsync = 1; in lx_blank_display()
537 blank = 1; hsync = 1; vsync = 1; in lx_blank_display()
540 blank = 1; hsync = 1; vsync = 0; in lx_blank_display()
543 blank = 1; hsync = 0; vsync = 1; in lx_blank_display()
546 blank = 1; hsync = 0; vsync = 0; in lx_blank_display()
557 if (hsync) in lx_blank_display()
566 if (vsync && hsync) in lx_blank_display()
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| /drivers/media/v4l2-core/ |
| D | v4l2-dv-timings.c | 285 bt->hsync, bt->hbackporch); in v4l2_print_dv_timings()
377 int v_fp, v_bp, h_fp, h_bp, hsync; in v4l2_detect_cvt() local
480 hsync = CVT_RB_H_SYNC; in v4l2_detect_cvt()
481 h_fp = h_blank - h_bp - hsync; in v4l2_detect_cvt()
502 hsync = frame_width * CVT_HSYNC_PERCENT / 100; in v4l2_detect_cvt()
503 hsync = (hsync / CVT_CELL_GRAN) * CVT_CELL_GRAN; in v4l2_detect_cvt()
504 h_fp = h_blank - hsync - h_bp; in v4l2_detect_cvt()
513 fmt->bt.hsync = hsync; in v4l2_detect_cvt()
515 fmt->bt.hbackporch = frame_width - image_width - h_fp - hsync; in v4l2_detect_cvt()
596 int v_fp, v_bp, h_fp, hsync; in v4l2_detect_gtf() local
[all …]
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| /drivers/video/fbdev/core/ |
| D | fbcvt.c | 47 u32 hsync; member
127 u32 hsync; in fb_cvt_hsync() local
130 hsync = 32; in fb_cvt_hsync()
132 hsync = (FB_CVT_CELLSIZE * cvt->htotal)/100; in fb_cvt_hsync()
134 hsync &= ~(FB_CVT_CELLSIZE - 1); in fb_cvt_hsync()
135 return hsync; in fb_cvt_hsync()
277 mode->hsync_len = cvt->hsync; in fb_cvt_convert_to_mode()
366 cvt.hsync = fb_cvt_hsync(&cvt); in fb_find_mode_cvt()
370 cvt.h_front_porch = cvt.hblank - cvt.hsync - cvt.h_back_porch + in fb_find_mode_cvt()
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| /drivers/gpu/drm/gma500/ |
| D | psb_intel_display.c | 276 REG_WRITE(map->hsync, (adjusted_mode->crtc_hsync_start - 1) | in psb_intel_crtc_mode_set()
391 int hsync; in psb_intel_crtc_mode_get() local
400 hsync = REG_READ(map->hsync); in psb_intel_crtc_mode_get()
406 hsync = p->hsync; in psb_intel_crtc_mode_get()
418 mode->hsync_start = (hsync & 0xffff) + 1; in psb_intel_crtc_mode_get()
419 mode->hsync_end = ((hsync & 0xffff0000) >> 16) + 1; in psb_intel_crtc_mode_get()
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| D | mdfld_device.c | 202 pipe->hsync = PSB_RVDC32(map->hsync); in mdfld_save_display_registers()
328 PSB_WVDC32(pipe->hsync, map->hsync); in mdfld_restore_display_registers()
457 .hsync = HSYNC_A,
479 .hsync = HSYNC_B,
502 .hsync = HSYNC_C,
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| D | cdv_intel_display.c | 803 REG_WRITE(map->hsync, (adjusted_mode->crtc_hsync_start - 1) | in cdv_intel_crtc_mode_set()
940 int hsync; in cdv_intel_crtc_mode_get() local
946 hsync = REG_READ(map->hsync); in cdv_intel_crtc_mode_get()
952 hsync = p->hsync; in cdv_intel_crtc_mode_get()
964 mode->hsync_start = (hsync & 0xffff) + 1; in cdv_intel_crtc_mode_get()
965 mode->hsync_end = ((hsync & 0xffff0000) >> 16) + 1; in cdv_intel_crtc_mode_get()
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| D | oaktrail_device.c | 215 p->hsync = PSB_RVDC32(HSYNC_A); in oaktrail_save_display_registers()
335 PSB_WVDC32(p->hsync, HSYNC_A); in oaktrail_restore_display_registers()
473 .hsync = HSYNC_A,
497 .hsync = HSYNC_B,
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| D | psb_device.c | 272 .hsync = HSYNC_A,
296 .hsync = HSYNC_B,
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| D | cdv_device.c | 535 .hsync = HSYNC_A,
560 .hsync = HSYNC_B,
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| D | oaktrail_crtc.c | 459 REG_WRITE_WITH_AUX(map->hsync, in oaktrail_crtc_mode_set()
477 REG_WRITE_WITH_AUX(map->hsync, (adjusted_mode->crtc_hsync_start - 1) | in oaktrail_crtc_mode_set()
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| D | psb_drv.h | 287 u32 hsync; member
321 u32 hsync; member
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| D | oaktrail_hdmi.c | 772 pipeb->hsync = PSB_RVDC32(HSYNC_B); in oaktrail_hdmi_save()
825 PSB_WVDC32(pipeb->hsync, HSYNC_B); in oaktrail_hdmi_restore()
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| /drivers/media/i2c/ |
| D | ths8200.c | 225 ths8200_write(sd, THS8200_DTG1_SPEC_A, bt->hsync); in ths8200_setup()
236 (bt->hbackporch + bt->hsync) & 0xff); in ths8200_setup()
244 ((bt->hbackporch + bt->hsync) & 0x100) >> 1); in ths8200_setup()
302 ths8200_write(sd, THS8200_DTG2_HLENGTH_LSB, bt->hsync & 0xff); in ths8200_setup()
304 (bt->hsync >> 2) & 0xc0); in ths8200_setup()
358 bt->hsync, bt->vsync); in ths8200_setup()
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| /drivers/gpu/drm/ |
| D | drm_modes.c | 397 int hsync, hfront_porch, vodd_front_porch_lines; in drm_gtf_mode_complex() local
499 hsync = H_SYNC_PERCENT * total_pixels / 100; in drm_gtf_mode_complex()
500 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; in drm_gtf_mode_complex()
501 hsync = hsync * GTF_CELL_GRAN; in drm_gtf_mode_complex()
503 hfront_porch = hblank / 2 - hsync; in drm_gtf_mode_complex()
510 drm_mode->hsync_end = drm_mode->hsync_start + hsync; in drm_gtf_mode_complex()
722 if (mode->hsync) in drm_mode_hsync()
723 return mode->hsync; in drm_mode_hsync()
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| /drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
| D | dacnv50.c | 49 args->v0.vsync, args->v0.hsync); in nv50_dac_power()
53 stat |= 0x00000001 * !args->v0.hsync; in nv50_dac_power()
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| /drivers/media/platform/soc_camera/ |
| D | soc_mediabus.c | 486 bool hsync = true, vsync = true, pclk, data, mode; in soc_mbus_config_compatible() local
493 hsync = common_flags & (V4L2_MBUS_HSYNC_ACTIVE_HIGH | in soc_mbus_config_compatible()
503 return (!hsync || !vsync || !pclk || !data || !mode) ? in soc_mbus_config_compatible()
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| /drivers/gpu/drm/i915/ |
| D | intel_dsi.c | 779 u16 hactive, hfp, hsync, hbp, vfp, vsync, vbp; in set_dsi_timings() local
783 hsync = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start; in set_dsi_timings()
791 hsync /= 2; in set_dsi_timings()
803 hsync = txbyteclkhs(hsync, bpp, lane_count, in set_dsi_timings()
828 I915_WRITE(MIPI_HSYNC_PADDING_COUNT(port), hsync); in set_dsi_timings()
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| D | intel_dsi_pll.c | 81 u32 hactive, vactive, hfp, hsync, hbp, vfp, vsync, vbp; in dsi_rr_formula() local
94 hsync = mode->hsync_end - mode->hsync_start; in dsi_rr_formula()
101 hsync_bytes = DIV_ROUND_UP(hsync * bpp, 8); in dsi_rr_formula()
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| /drivers/video/fbdev/ |
| D | nuc900fb.c | 204 int hsync = var->width + var->right_margin; in nuc900fb_calculate_lcd_regs() local
213 regs->lcd_crtc_hsync = LCM_CRTC_HSYNC_EVAL(hsync + var->hsync_len) | in nuc900fb_calculate_lcd_regs()
214 LCM_CRTC_HSYNC_SVAL(hsync); in nuc900fb_calculate_lcd_regs()
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| D | pxa168fb.h | 379 #define CFG_INV_HSYNC(hsync) ((hsync) << 2) argument
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| D | atafb.c | 862 int right, hsync, left; /* standard timing in clock cycles, not pixel */ member
1084 hsync_len = pclock->hsync / plen; in falcon_decode_var()
1114 if ((plen * xres + f25.right + f25.hsync + f25.left) * in falcon_decode_var()
1117 else if ((plen * xres + f32.right + f32.hsync + in falcon_decode_var()
1120 else if ((plen * xres + fext.right + fext.hsync + in falcon_decode_var()
1129 hsync_len = pclock->hsync / plen; in falcon_decode_var()
1794 f25.hsync = h_syncs[mon_type] / f25.t; in falcon_detect()
1795 f32.hsync = h_syncs[mon_type] / f32.t; in falcon_detect()
1797 fext.hsync = h_syncs[mon_type] / fext.t; in falcon_detect()
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| D | w100fb.c | 1514 unsigned long hsync; in calc_hsync() local
1519 hsync=par->mach->xtal_freq; in calc_hsync()
1521 hsync=((par->fastpll_mode && mode->fast_pll_freq) ? mode->fast_pll_freq : mode->pll_freq)*100000; in calc_hsync()
1523 hsync /= (w100_pwr_state.pclk_cntl.f.pclk_post_div + 1); in calc_hsync()
1527 par->hsync_len = hsync / (crtc_ss.f.ss_end-crtc_ss.f.ss_start); in calc_hsync()
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| /drivers/gpu/drm/ast/ |
| D | ast_drv.h | 289 u32 hsync; member
|