Home
last modified time | relevance | path

Searched refs:rate_table (Results 1 – 17 of 17) sorted by relevance

/drivers/clk/rockchip/
Dclk-pll.c42 const struct rockchip_pll_rate_table *rate_table; member
54 const struct rockchip_pll_rate_table *rate_table = pll->rate_table; in rockchip_get_pll_settings() local
58 if (rate == rate_table[i].rate) in rockchip_get_pll_settings()
59 return &rate_table[i]; in rockchip_get_pll_settings()
69 const struct rockchip_pll_rate_table *rate_table = pll->rate_table; in rockchip_pll_round_rate() local
74 if (drate >= rate_table[i].rate) in rockchip_pll_round_rate()
75 return rate_table[i].rate; in rockchip_pll_round_rate()
79 return rate_table[i - 1].rate; in rockchip_pll_round_rate()
347 int mode_shift, struct rockchip_pll_rate_table *rate_table, in rockchip_clk_register_pll() argument
406 if (rate_table) { in rockchip_clk_register_pll()
[all …]
Dclk-cpu.c65 struct rockchip_cpuclk_rate_table *rate_table; member
77 const struct rockchip_cpuclk_rate_table *rate_table = in rockchip_get_cpuclk_settings() local
78 cpuclk->rate_table; in rockchip_get_cpuclk_settings()
82 if (rate == rate_table[i].prate) in rockchip_get_cpuclk_settings()
83 return &rate_table[i]; in rockchip_get_cpuclk_settings()
305 cpuclk->rate_table = kmemdup(rates, in rockchip_clk_register_cpuclk()
308 if (!cpuclk->rate_table) { in rockchip_clk_register_cpuclk()
326 kfree(cpuclk->rate_table); in rockchip_clk_register_cpuclk()
Dclk.h136 struct rockchip_pll_rate_table *rate_table; member
155 .rate_table = _rtable, \
162 int mode_shift, struct rockchip_pll_rate_table *rate_table,
Dclk-rk3188.c821 if (!pll->rate_table) in rk3188_clk_init()
824 rate = pll->rate_table; in rk3188_clk_init()
Dclk.c209 list->mode_shift, list->rate_table, in rockchip_clk_register_plls()
/drivers/clk/meson/
Dclk-pll.c87 const struct pll_rate_table *rate_table = pll->conf->rate_table; in meson_clk_pll_round_rate() local
91 if (rate <= rate_table[i].rate) in meson_clk_pll_round_rate()
92 return rate_table[i].rate; in meson_clk_pll_round_rate()
96 return rate_table[0].rate; in meson_clk_pll_round_rate()
102 const struct pll_rate_table *rate_table = pll->conf->rate_table; in meson_clk_get_pll_settings() local
106 if (rate == rate_table[i].rate) in meson_clk_get_pll_settings()
107 return &rate_table[i]; in meson_clk_get_pll_settings()
210 if (clk_pll->conf->rate_table) { in meson_clk_register_pll()
213 for (len = 0; clk_pll->conf->rate_table[len].rate != 0; ) in meson_clk_register_pll()
Dmeson8b-clkc.c125 .rate_table = sys_pll_rate_table,
Dclkc.h59 const struct pll_rate_table *rate_table; member
/drivers/clk/samsung/
Dclk-pll.c28 const struct samsung_pll_rate_table *rate_table; member
36 const struct samsung_pll_rate_table *rate_table = pll->rate_table; in samsung_get_pll_settings() local
40 if (rate == rate_table[i].rate) in samsung_get_pll_settings()
41 return &rate_table[i]; in samsung_get_pll_settings()
51 const struct samsung_pll_rate_table *rate_table = pll->rate_table; in samsung_pll_round_rate() local
56 if (drate >= rate_table[i].rate) in samsung_pll_round_rate()
57 return rate_table[i].rate; in samsung_pll_round_rate()
61 return rate_table[i - 1].rate; in samsung_pll_round_rate()
1181 if (pll_clk->rate_table) { in _samsung_clk_register_pll()
1183 for (len = 0; pll_clk->rate_table[len].rate != 0; ) in _samsung_clk_register_pll()
[all …]
Dclk-s3c2410.c386 s3c2410_plls[mpll].rate_table = pll_s3c2410_12mhz_tbl; in s3c2410_common_clk_init()
387 s3c2410_plls[upll].rate_table = pll_s3c2410_12mhz_tbl; in s3c2410_common_clk_init()
400 s3c244x_common_plls[mpll].rate_table = in s3c2410_common_clk_init()
402 s3c244x_common_plls[upll].rate_table = in s3c2410_common_clk_init()
Dclk-exynos4.c1467 exynos4210_plls[apll].rate_table = in exynos4_clk_init()
1469 exynos4210_plls[epll].rate_table = in exynos4_clk_init()
1474 exynos4210_plls[vpll].rate_table = in exynos4_clk_init()
1481 exynos4x12_plls[apll].rate_table = in exynos4_clk_init()
1483 exynos4x12_plls[epll].rate_table = in exynos4_clk_init()
1485 exynos4x12_plls[vpll].rate_table = in exynos4_clk_init()
Dclk.h297 const struct samsung_pll_rate_table *rate_table; member
312 .rate_table = _rtable, \
Dclk-exynos5250.c817 exynos5250_plls[epll].rate_table = epll_24mhz_tbl; in exynos5250_clk_init()
818 exynos5250_plls[apll].rate_table = apll_24mhz_tbl; in exynos5250_clk_init()
822 exynos5250_plls[vpll].rate_table = vpll_24mhz_tbl; in exynos5250_clk_init()
Dclk-exynos5420.c1288 exynos5x_plls[apll].rate_table = exynos5420_pll2550x_24mhz_tbl; in exynos5x_clk_init()
1289 exynos5x_plls[kpll].rate_table = exynos5420_pll2550x_24mhz_tbl; in exynos5x_clk_init()
/drivers/hwmon/
Dads1015.c80 const unsigned int * const rate_table = data->id == ads1115 ? in ads1015_read_adc() local
91 conversion_time_ms = DIV_ROUND_UP(1000, rate_table[data_rate]); in ads1015_read_adc()
/drivers/net/wireless/mediatek/mt7601u/
Dphy.c814 struct power_per_rate *rate_table; in mt7601u_tssi_params_get() local
827 rate_table = dev->ee->power_rate_table.cck; in mt7601u_tssi_params_get()
832 rate_table = dev->ee->power_rate_table.ofdm; in mt7601u_tssi_params_get()
838 rate_table = dev->ee->power_rate_table.ht; in mt7601u_tssi_params_get()
843 p.trgt_power += rate_table[tx_rate / 2].bw20; in mt7601u_tssi_params_get()
845 p.trgt_power += rate_table[tx_rate / 2].bw40; in mt7601u_tssi_params_get()
/drivers/net/wireless/brcm80211/brcmsmac/phy/
Dphy_lcn.c2305 u32 rate_table[BRCMS_NUM_RATES_CCK + BRCMS_NUM_RATES_OFDM + in wlc_lcnphy_txpower_recalc_target() local
2311 for (i = 0, j = 0; i < ARRAY_SIZE(rate_table); i++, j++) { in wlc_lcnphy_txpower_recalc_target()
2316 rate_table[i] = (u32) ((s32) (-pi->tx_power_offset[j])); in wlc_lcnphy_txpower_recalc_target()
2321 tab.tbl_len = ARRAY_SIZE(rate_table); in wlc_lcnphy_txpower_recalc_target()
2322 tab.tbl_ptr = rate_table; in wlc_lcnphy_txpower_recalc_target()