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1 /*
2  * Based on arch/arm/kernel/setup.c
3  *
4  * Copyright (C) 1995-2001 Russell King
5  * Copyright (C) 2012 ARM Ltd.
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
18  */
19 
20 #include <linux/acpi.h>
21 #include <linux/export.h>
22 #include <linux/kernel.h>
23 #include <linux/stddef.h>
24 #include <linux/ioport.h>
25 #include <linux/delay.h>
26 #include <linux/utsname.h>
27 #include <linux/initrd.h>
28 #include <linux/console.h>
29 #include <linux/cache.h>
30 #include <linux/bootmem.h>
31 #include <linux/screen_info.h>
32 #include <linux/init.h>
33 #include <linux/kexec.h>
34 #include <linux/crash_dump.h>
35 #include <linux/root_dev.h>
36 #include <linux/cpu.h>
37 #include <linux/interrupt.h>
38 #include <linux/smp.h>
39 #include <linux/fs.h>
40 #include <linux/proc_fs.h>
41 #include <linux/memblock.h>
42 #include <linux/of_iommu.h>
43 #include <linux/of_fdt.h>
44 #include <linux/of_platform.h>
45 #include <linux/efi.h>
46 #include <linux/psci.h>
47 #include <linux/mm.h>
48 
49 #include <asm/acpi.h>
50 #include <asm/fixmap.h>
51 #include <asm/cpu.h>
52 #include <asm/cputype.h>
53 #include <asm/elf.h>
54 #include <asm/cpufeature.h>
55 #include <asm/cpu_ops.h>
56 #include <asm/kasan.h>
57 #include <asm/sections.h>
58 #include <asm/setup.h>
59 #include <asm/smp_plat.h>
60 #include <asm/cacheflush.h>
61 #include <asm/tlbflush.h>
62 #include <asm/traps.h>
63 #include <asm/memblock.h>
64 #include <asm/efi.h>
65 #include <asm/xen/hypervisor.h>
66 #include <asm/mmu_context.h>
67 
68 phys_addr_t __fdt_pointer __initdata;
69 
70 /*
71  * Standard memory resources
72  */
73 static struct resource mem_res[] = {
74 	{
75 		.name = "Kernel code",
76 		.start = 0,
77 		.end = 0,
78 		.flags = IORESOURCE_MEM
79 	},
80 	{
81 		.name = "Kernel data",
82 		.start = 0,
83 		.end = 0,
84 		.flags = IORESOURCE_MEM
85 	}
86 };
87 
88 #define kernel_code mem_res[0]
89 #define kernel_data mem_res[1]
90 
91 /*
92  * The recorded values of x0 .. x3 upon kernel entry.
93  */
94 u64 __cacheline_aligned boot_args[4];
95 
smp_setup_processor_id(void)96 void __init smp_setup_processor_id(void)
97 {
98 	u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
99 	cpu_logical_map(0) = mpidr;
100 
101 	/*
102 	 * clear __my_cpu_offset on boot CPU to avoid hang caused by
103 	 * using percpu variable early, for example, lockdep will
104 	 * access percpu variable inside lock_release
105 	 */
106 	set_my_cpu_offset(0);
107 	pr_info("Booting Linux on physical CPU 0x%lx\n", (unsigned long)mpidr);
108 }
109 
arch_match_cpu_phys_id(int cpu,u64 phys_id)110 bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
111 {
112 	return phys_id == cpu_logical_map(cpu);
113 }
114 
115 struct mpidr_hash mpidr_hash;
116 /**
117  * smp_build_mpidr_hash - Pre-compute shifts required at each affinity
118  *			  level in order to build a linear index from an
119  *			  MPIDR value. Resulting algorithm is a collision
120  *			  free hash carried out through shifting and ORing
121  */
smp_build_mpidr_hash(void)122 static void __init smp_build_mpidr_hash(void)
123 {
124 	u32 i, affinity, fs[4], bits[4], ls;
125 	u64 mask = 0;
126 	/*
127 	 * Pre-scan the list of MPIDRS and filter out bits that do
128 	 * not contribute to affinity levels, ie they never toggle.
129 	 */
130 	for_each_possible_cpu(i)
131 		mask |= (cpu_logical_map(i) ^ cpu_logical_map(0));
132 	pr_debug("mask of set bits %#llx\n", mask);
133 	/*
134 	 * Find and stash the last and first bit set at all affinity levels to
135 	 * check how many bits are required to represent them.
136 	 */
137 	for (i = 0; i < 4; i++) {
138 		affinity = MPIDR_AFFINITY_LEVEL(mask, i);
139 		/*
140 		 * Find the MSB bit and LSB bits position
141 		 * to determine how many bits are required
142 		 * to express the affinity level.
143 		 */
144 		ls = fls(affinity);
145 		fs[i] = affinity ? ffs(affinity) - 1 : 0;
146 		bits[i] = ls - fs[i];
147 	}
148 	/*
149 	 * An index can be created from the MPIDR_EL1 by isolating the
150 	 * significant bits at each affinity level and by shifting
151 	 * them in order to compress the 32 bits values space to a
152 	 * compressed set of values. This is equivalent to hashing
153 	 * the MPIDR_EL1 through shifting and ORing. It is a collision free
154 	 * hash though not minimal since some levels might contain a number
155 	 * of CPUs that is not an exact power of 2 and their bit
156 	 * representation might contain holes, eg MPIDR_EL1[7:0] = {0x2, 0x80}.
157 	 */
158 	mpidr_hash.shift_aff[0] = MPIDR_LEVEL_SHIFT(0) + fs[0];
159 	mpidr_hash.shift_aff[1] = MPIDR_LEVEL_SHIFT(1) + fs[1] - bits[0];
160 	mpidr_hash.shift_aff[2] = MPIDR_LEVEL_SHIFT(2) + fs[2] -
161 						(bits[1] + bits[0]);
162 	mpidr_hash.shift_aff[3] = MPIDR_LEVEL_SHIFT(3) +
163 				  fs[3] - (bits[2] + bits[1] + bits[0]);
164 	mpidr_hash.mask = mask;
165 	mpidr_hash.bits = bits[3] + bits[2] + bits[1] + bits[0];
166 	pr_debug("MPIDR hash: aff0[%u] aff1[%u] aff2[%u] aff3[%u] mask[%#llx] bits[%u]\n",
167 		mpidr_hash.shift_aff[0],
168 		mpidr_hash.shift_aff[1],
169 		mpidr_hash.shift_aff[2],
170 		mpidr_hash.shift_aff[3],
171 		mpidr_hash.mask,
172 		mpidr_hash.bits);
173 	/*
174 	 * 4x is an arbitrary value used to warn on a hash table much bigger
175 	 * than expected on most systems.
176 	 */
177 	if (mpidr_hash_size() > 4 * num_possible_cpus())
178 		pr_warn("Large number of MPIDR hash buckets detected\n");
179 	__flush_dcache_area(&mpidr_hash, sizeof(struct mpidr_hash));
180 }
181 
setup_machine_fdt(phys_addr_t dt_phys)182 static void __init setup_machine_fdt(phys_addr_t dt_phys)
183 {
184 	void *dt_virt = fixmap_remap_fdt(dt_phys);
185 
186 	if (!dt_virt || !early_init_dt_scan(dt_virt)) {
187 		pr_crit("\n"
188 			"Error: invalid device tree blob at physical address %pa (virtual address 0x%p)\n"
189 			"The dtb must be 8-byte aligned and must not exceed 2 MB in size\n"
190 			"\nPlease check your bootloader.",
191 			&dt_phys, dt_virt);
192 
193 		while (true)
194 			cpu_relax();
195 	}
196 
197 	dump_stack_set_arch_desc("%s (DT)", of_flat_dt_get_machine_name());
198 }
199 
request_standard_resources(void)200 static void __init request_standard_resources(void)
201 {
202 	struct memblock_region *region;
203 	struct resource *res;
204 
205 	kernel_code.start   = __pa_symbol(_text);
206 	kernel_code.end     = __pa_symbol(__init_begin - 1);
207 	kernel_data.start   = __pa_symbol(_sdata);
208 	kernel_data.end     = __pa_symbol(_end - 1);
209 
210 	for_each_memblock(memory, region) {
211 		res = alloc_bootmem_low(sizeof(*res));
212 		res->name  = "System RAM";
213 		res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
214 		res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
215 		res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
216 
217 		request_resource(&iomem_resource, res);
218 
219 		if (kernel_code.start >= res->start &&
220 		    kernel_code.end <= res->end)
221 			request_resource(res, &kernel_code);
222 		if (kernel_data.start >= res->start &&
223 		    kernel_data.end <= res->end)
224 			request_resource(res, &kernel_data);
225 	}
226 }
227 
228 #ifdef CONFIG_BLK_DEV_INITRD
229 /*
230  * Relocate initrd if it is not completely within the linear mapping.
231  * This would be the case if mem= cuts out all or part of it.
232  */
relocate_initrd(void)233 static void __init relocate_initrd(void)
234 {
235 	phys_addr_t orig_start = __virt_to_phys(initrd_start);
236 	phys_addr_t orig_end = __virt_to_phys(initrd_end);
237 	phys_addr_t ram_end = memblock_end_of_DRAM();
238 	phys_addr_t new_start;
239 	unsigned long size, to_free = 0;
240 	void *dest;
241 
242 	if (orig_end <= ram_end)
243 		return;
244 
245 	/*
246 	 * Any of the original initrd which overlaps the linear map should
247 	 * be freed after relocating.
248 	 */
249 	if (orig_start < ram_end)
250 		to_free = ram_end - orig_start;
251 
252 	size = orig_end - orig_start;
253 	if (!size)
254 		return;
255 
256 	/* initrd needs to be relocated completely inside linear mapping */
257 	new_start = memblock_find_in_range(0, PFN_PHYS(max_pfn),
258 					   size, PAGE_SIZE);
259 	if (!new_start)
260 		panic("Cannot relocate initrd of size %ld\n", size);
261 	memblock_reserve(new_start, size);
262 
263 	initrd_start = __phys_to_virt(new_start);
264 	initrd_end   = initrd_start + size;
265 
266 	pr_info("Moving initrd from [%llx-%llx] to [%llx-%llx]\n",
267 		orig_start, orig_start + size - 1,
268 		new_start, new_start + size - 1);
269 
270 	dest = (void *)initrd_start;
271 
272 	if (to_free) {
273 		memcpy(dest, (void *)__phys_to_virt(orig_start), to_free);
274 		dest += to_free;
275 	}
276 
277 	copy_from_early_mem(dest, orig_start + to_free, size - to_free);
278 
279 	if (to_free) {
280 		pr_info("Freeing original RAMDISK from [%llx-%llx]\n",
281 			orig_start, orig_start + to_free - 1);
282 		memblock_free(orig_start, to_free);
283 	}
284 }
285 #else
relocate_initrd(void)286 static inline void __init relocate_initrd(void)
287 {
288 }
289 #endif
290 
291 u64 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID };
292 
setup_arch(char ** cmdline_p)293 void __init setup_arch(char **cmdline_p)
294 {
295 	pr_info("Boot CPU: AArch64 Processor [%08x]\n", read_cpuid_id());
296 
297 	sprintf(init_utsname()->machine, ELF_PLATFORM);
298 	init_mm.start_code = (unsigned long) _text;
299 	init_mm.end_code   = (unsigned long) _etext;
300 	init_mm.end_data   = (unsigned long) _edata;
301 	init_mm.brk	   = (unsigned long) _end;
302 
303 	*cmdline_p = boot_command_line;
304 
305 	early_fixmap_init();
306 	early_ioremap_init();
307 
308 	setup_machine_fdt(__fdt_pointer);
309 
310 	parse_early_param();
311 
312 	/*
313 	 *  Unmask asynchronous aborts after bringing up possible earlycon.
314 	 * (Report possible System Errors once we can report this occurred)
315 	 */
316 	local_async_enable();
317 
318 	/*
319 	 * TTBR0 is only used for the identity mapping at this stage. Make it
320 	 * point to zero page to avoid speculatively fetching new entries.
321 	 */
322 	cpu_uninstall_idmap();
323 
324 	efi_init();
325 	arm64_memblock_init();
326 
327 	/* Parse the ACPI tables for possible boot-time configuration */
328 	acpi_boot_table_init();
329 
330 	paging_init();
331 	relocate_initrd();
332 
333 	kasan_init();
334 
335 	request_standard_resources();
336 
337 	early_ioremap_reset();
338 
339 	if (acpi_disabled) {
340 		unflatten_device_tree();
341 		psci_dt_init();
342 	} else {
343 		psci_acpi_init();
344 	}
345 	xen_early_init();
346 
347 	cpu_read_bootcpu_ops();
348 	smp_init_cpus();
349 	smp_build_mpidr_hash();
350 
351 #ifdef CONFIG_ARM64_SW_TTBR0_PAN
352 	/*
353 	 * Make sure thread_info.ttbr0 always generates translation
354 	 * faults in case uaccess_enable() is inadvertently called by the init
355 	 * thread.
356 	 */
357 #ifdef CONFIG_THREAD_INFO_IN_TASK
358 	init_task.thread_info.ttbr0 = __pa_symbol(empty_zero_page);
359 #else
360 	init_thread_info.ttbr0 = __pa_symbol(empty_zero_page);
361 #endif
362 #endif
363 
364 #ifdef CONFIG_VT
365 #if defined(CONFIG_VGA_CONSOLE)
366 	conswitchp = &vga_con;
367 #elif defined(CONFIG_DUMMY_CONSOLE)
368 	conswitchp = &dummy_con;
369 #endif
370 #endif
371 	if (boot_args[1] || boot_args[2] || boot_args[3]) {
372 		pr_err("WARNING: x1-x3 nonzero in violation of boot protocol:\n"
373 			"\tx1: %016llx\n\tx2: %016llx\n\tx3: %016llx\n"
374 			"This indicates a broken bootloader or old kernel\n",
375 			boot_args[1], boot_args[2], boot_args[3]);
376 	}
377 }
378 
arm64_device_init(void)379 static int __init arm64_device_init(void)
380 {
381 	if (of_have_populated_dt()) {
382 		of_iommu_init();
383 		of_platform_populate(NULL, of_default_bus_match_table,
384 				     NULL, NULL);
385 	} else if (acpi_disabled) {
386 		pr_crit("Device tree not populated\n");
387 	}
388 	return 0;
389 }
390 arch_initcall_sync(arm64_device_init);
391 
topology_init(void)392 static int __init topology_init(void)
393 {
394 	int i;
395 
396 	for_each_possible_cpu(i) {
397 		struct cpu *cpu = &per_cpu(cpu_data.cpu, i);
398 		cpu->hotpluggable = 1;
399 		register_cpu(cpu, i);
400 	}
401 
402 	return 0;
403 }
404 subsys_initcall(topology_init);
405 
406 /*
407  * Dump out kernel offset information on panic.
408  */
dump_kernel_offset(struct notifier_block * self,unsigned long v,void * p)409 static int dump_kernel_offset(struct notifier_block *self, unsigned long v,
410 			      void *p)
411 {
412 	const unsigned long offset = kaslr_offset();
413 
414 	if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && offset > 0) {
415 		pr_emerg("Kernel Offset: 0x%lx from 0x%lx\n",
416 			 offset, KIMAGE_VADDR);
417 	} else {
418 		pr_emerg("Kernel Offset: disabled\n");
419 	}
420 	return 0;
421 }
422 
423 static struct notifier_block kernel_offset_notifier = {
424 	.notifier_call = dump_kernel_offset
425 };
426 
register_kernel_offset_dumper(void)427 static int __init register_kernel_offset_dumper(void)
428 {
429 	atomic_notifier_chain_register(&panic_notifier_list,
430 				       &kernel_offset_notifier);
431 	return 0;
432 }
433 __initcall(register_kernel_offset_dumper);
434