1/* 2 * ld script for the x86 kernel 3 * 4 * Historic 32-bit version written by Martin Mares <mj@atrey.karlin.mff.cuni.cz> 5 * 6 * Modernisation, unification and other changes and fixes: 7 * Copyright (C) 2007-2009 Sam Ravnborg <sam@ravnborg.org> 8 * 9 * 10 * Don't define absolute symbols until and unless you know that symbol 11 * value is should remain constant even if kernel image is relocated 12 * at run time. Absolute symbols are not relocated. If symbol value should 13 * change if kernel is relocated, make the symbol section relative and 14 * put it inside the section definition. 15 */ 16 17#ifdef CONFIG_X86_32 18#define LOAD_OFFSET __PAGE_OFFSET 19#else 20#define LOAD_OFFSET __START_KERNEL_map 21#endif 22 23#include <asm-generic/vmlinux.lds.h> 24#include <asm/asm-offsets.h> 25#include <asm/thread_info.h> 26#include <asm/page_types.h> 27#include <asm/cache.h> 28#include <asm/boot.h> 29 30#undef i386 /* in case the preprocessor is a 32bit one */ 31 32OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT) 33 34#ifdef CONFIG_X86_32 35OUTPUT_ARCH(i386) 36ENTRY(phys_startup_32) 37#else 38OUTPUT_ARCH(i386:x86-64) 39ENTRY(phys_startup_64) 40#endif 41 42jiffies = jiffies_64; 43 44#if defined(CONFIG_X86_64) 45/* 46 * On 64-bit, align RODATA to 2MB so we retain large page mappings for 47 * boundaries spanning kernel text, rodata and data sections. 48 * 49 * However, kernel identity mappings will have different RWX permissions 50 * to the pages mapping to text and to the pages padding (which are freed) the 51 * text section. Hence kernel identity mappings will be broken to smaller 52 * pages. For 64-bit, kernel text and kernel identity mappings are different, 53 * so we can enable protection checks as well as retain 2MB large page 54 * mappings for kernel text. 55 */ 56#define X64_ALIGN_RODATA_BEGIN . = ALIGN(HPAGE_SIZE); 57 58#define X64_ALIGN_RODATA_END \ 59 . = ALIGN(HPAGE_SIZE); \ 60 __end_rodata_hpage_align = .; 61 62#else 63 64#define X64_ALIGN_RODATA_BEGIN 65#define X64_ALIGN_RODATA_END 66 67#endif 68 69PHDRS { 70 text PT_LOAD FLAGS(5); /* R_E */ 71 data PT_LOAD FLAGS(6); /* RW_ */ 72#ifdef CONFIG_X86_64 73#ifdef CONFIG_SMP 74 percpu PT_LOAD FLAGS(6); /* RW_ */ 75#endif 76 init PT_LOAD FLAGS(7); /* RWE */ 77#endif 78 note PT_NOTE FLAGS(0); /* ___ */ 79} 80 81SECTIONS 82{ 83#ifdef CONFIG_X86_32 84 . = LOAD_OFFSET + LOAD_PHYSICAL_ADDR; 85 phys_startup_32 = startup_32 - LOAD_OFFSET; 86#else 87 . = __START_KERNEL; 88 phys_startup_64 = startup_64 - LOAD_OFFSET; 89#endif 90 91 /* Text and read-only data */ 92 .text : AT(ADDR(.text) - LOAD_OFFSET) { 93 _text = .; 94 /* bootstrapping code */ 95 HEAD_TEXT 96 . = ALIGN(8); 97 _stext = .; 98 TEXT_TEXT 99 SCHED_TEXT 100 LOCK_TEXT 101 KPROBES_TEXT 102 ENTRY_TEXT 103 IRQENTRY_TEXT 104 SOFTIRQENTRY_TEXT 105 *(.fixup) 106 *(.gnu.warning) 107 108#ifdef CONFIG_RETPOLINE 109 __indirect_thunk_start = .; 110 *(.text.__x86.indirect_thunk) 111 __indirect_thunk_end = .; 112#endif 113 114 /* End of text section */ 115 _etext = .; 116 } :text = 0x9090 117 118 NOTES :text :note 119 120 EXCEPTION_TABLE(16) :text = 0x9090 121 122 /* .text should occupy whole number of pages */ 123 . = ALIGN(PAGE_SIZE); 124 X64_ALIGN_RODATA_BEGIN 125 RO_DATA(PAGE_SIZE) 126 X64_ALIGN_RODATA_END 127 128 /* Data */ 129 .data : AT(ADDR(.data) - LOAD_OFFSET) { 130 /* Start of data section */ 131 _sdata = .; 132 133 /* init_task */ 134 INIT_TASK_DATA(THREAD_SIZE) 135 136#ifdef CONFIG_X86_32 137 /* 32 bit has nosave before _edata */ 138 NOSAVE_DATA 139#endif 140 141 PAGE_ALIGNED_DATA(PAGE_SIZE) 142 143 CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES) 144 145 DATA_DATA 146 CONSTRUCTORS 147 148 /* rarely changed data like cpu maps */ 149 READ_MOSTLY_DATA(INTERNODE_CACHE_BYTES) 150 151 /* End of data section */ 152 _edata = .; 153 } :data 154 155 156 . = ALIGN(PAGE_SIZE); 157 __vvar_page = .; 158 159 .vvar : AT(ADDR(.vvar) - LOAD_OFFSET) { 160 /* work around gold bug 13023 */ 161 __vvar_beginning_hack = .; 162 163 /* Place all vvars at the offsets in asm/vvar.h. */ 164#define EMIT_VVAR(name, offset) \ 165 . = __vvar_beginning_hack + offset; \ 166 *(.vvar_ ## name) 167#define __VVAR_KERNEL_LDS 168#include <asm/vvar.h> 169#undef __VVAR_KERNEL_LDS 170#undef EMIT_VVAR 171 172 /* 173 * Pad the rest of the page with zeros. Otherwise the loader 174 * can leave garbage here. 175 */ 176 . = __vvar_beginning_hack + PAGE_SIZE; 177 } :data 178 179 . = ALIGN(__vvar_page + PAGE_SIZE, PAGE_SIZE); 180 181 /* Init code and data - will be freed after init */ 182 . = ALIGN(PAGE_SIZE); 183 .init.begin : AT(ADDR(.init.begin) - LOAD_OFFSET) { 184 __init_begin = .; /* paired with __init_end */ 185 } 186 187#if defined(CONFIG_X86_64) && defined(CONFIG_SMP) 188 /* 189 * percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the 190 * output PHDR, so the next output section - .init.text - should 191 * start another segment - init. 192 */ 193 PERCPU_VADDR(INTERNODE_CACHE_BYTES, 0, :percpu) 194 ASSERT(SIZEOF(.data..percpu) < CONFIG_PHYSICAL_START, 195 "per-CPU data too large - increase CONFIG_PHYSICAL_START") 196#endif 197 198 INIT_TEXT_SECTION(PAGE_SIZE) 199#ifdef CONFIG_X86_64 200 :init 201#endif 202 203 /* 204 * Section for code used exclusively before alternatives are run. All 205 * references to such code must be patched out by alternatives, normally 206 * by using X86_FEATURE_ALWAYS CPU feature bit. 207 * 208 * See static_cpu_has() for an example. 209 */ 210 .altinstr_aux : AT(ADDR(.altinstr_aux) - LOAD_OFFSET) { 211 *(.altinstr_aux) 212 } 213 214 INIT_DATA_SECTION(16) 215 216 .x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) { 217 __x86_cpu_dev_start = .; 218 *(.x86_cpu_dev.init) 219 __x86_cpu_dev_end = .; 220 } 221 222#ifdef CONFIG_X86_INTEL_MID 223 .x86_intel_mid_dev.init : AT(ADDR(.x86_intel_mid_dev.init) - \ 224 LOAD_OFFSET) { 225 __x86_intel_mid_dev_start = .; 226 *(.x86_intel_mid_dev.init) 227 __x86_intel_mid_dev_end = .; 228 } 229#endif 230 231 /* 232 * start address and size of operations which during runtime 233 * can be patched with virtualization friendly instructions or 234 * baremetal native ones. Think page table operations. 235 * Details in paravirt_types.h 236 */ 237 . = ALIGN(8); 238 .parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) { 239 __parainstructions = .; 240 *(.parainstructions) 241 __parainstructions_end = .; 242 } 243 244 /* 245 * struct alt_inst entries. From the header (alternative.h): 246 * "Alternative instructions for different CPU types or capabilities" 247 * Think locking instructions on spinlocks. 248 */ 249 . = ALIGN(8); 250 .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) { 251 __alt_instructions = .; 252 *(.altinstructions) 253 __alt_instructions_end = .; 254 } 255 256 /* 257 * And here are the replacement instructions. The linker sticks 258 * them as binary blobs. The .altinstructions has enough data to 259 * get the address and the length of them to patch the kernel safely. 260 */ 261 .altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) { 262 *(.altinstr_replacement) 263 } 264 265 /* 266 * struct iommu_table_entry entries are injected in this section. 267 * It is an array of IOMMUs which during run time gets sorted depending 268 * on its dependency order. After rootfs_initcall is complete 269 * this section can be safely removed. 270 */ 271 .iommu_table : AT(ADDR(.iommu_table) - LOAD_OFFSET) { 272 __iommu_table = .; 273 *(.iommu_table) 274 __iommu_table_end = .; 275 } 276 277 . = ALIGN(8); 278 .apicdrivers : AT(ADDR(.apicdrivers) - LOAD_OFFSET) { 279 __apicdrivers = .; 280 *(.apicdrivers); 281 __apicdrivers_end = .; 282 } 283 284 . = ALIGN(8); 285 /* 286 * .exit.text is discard at runtime, not link time, to deal with 287 * references from .altinstructions and .eh_frame 288 */ 289 .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) { 290 EXIT_TEXT 291 } 292 293 .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) { 294 EXIT_DATA 295 } 296 297#if !defined(CONFIG_X86_64) || !defined(CONFIG_SMP) 298 PERCPU_SECTION(INTERNODE_CACHE_BYTES) 299#endif 300 301 . = ALIGN(PAGE_SIZE); 302 303 /* freed after init ends here */ 304 .init.end : AT(ADDR(.init.end) - LOAD_OFFSET) { 305 __init_end = .; 306 } 307 308 /* 309 * smp_locks might be freed after init 310 * start/end must be page aligned 311 */ 312 . = ALIGN(PAGE_SIZE); 313 .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) { 314 __smp_locks = .; 315 *(.smp_locks) 316 . = ALIGN(PAGE_SIZE); 317 __smp_locks_end = .; 318 } 319 320#ifdef CONFIG_X86_64 321 .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) { 322 NOSAVE_DATA 323 } 324#endif 325 326 /* BSS */ 327 . = ALIGN(PAGE_SIZE); 328 .bss : AT(ADDR(.bss) - LOAD_OFFSET) { 329 __bss_start = .; 330 *(.bss..page_aligned) 331 *(.bss) 332 . = ALIGN(PAGE_SIZE); 333 __bss_stop = .; 334 } 335 336 . = ALIGN(PAGE_SIZE); 337 .brk : AT(ADDR(.brk) - LOAD_OFFSET) { 338 __brk_base = .; 339 . += 64 * 1024; /* 64k alignment slop space */ 340 *(.brk_reservation) /* areas brk users have reserved */ 341 __brk_limit = .; 342 } 343 344 _end = .; 345 346 STABS_DEBUG 347 DWARF_DEBUG 348 349 /* Sections to be discarded */ 350 DISCARDS 351 /DISCARD/ : { *(.eh_frame) } 352} 353 354 355#ifdef CONFIG_X86_32 356/* 357 * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility: 358 */ 359. = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE), 360 "kernel image bigger than KERNEL_IMAGE_SIZE"); 361#else 362/* 363 * Per-cpu symbols which need to be offset from __per_cpu_load 364 * for the boot processor. 365 */ 366#define INIT_PER_CPU(x) init_per_cpu__##x = ABSOLUTE(x) + __per_cpu_load 367INIT_PER_CPU(gdt_page); 368INIT_PER_CPU(irq_stack_union); 369 370/* 371 * Build-time check on the image size: 372 */ 373. = ASSERT((_end - _text <= KERNEL_IMAGE_SIZE), 374 "kernel image bigger than KERNEL_IMAGE_SIZE"); 375 376#ifdef CONFIG_SMP 377. = ASSERT((irq_stack_union == 0), 378 "irq_stack_union is not at start of per-cpu area"); 379#endif 380 381#endif /* CONFIG_X86_32 */ 382 383#ifdef CONFIG_KEXEC_CORE 384#include <asm/kexec.h> 385 386. = ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE, 387 "kexec control code size is too big"); 388#endif 389 390