1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8 #include <linux/delay.h>
9 #include <linux/pci.h>
10 #include <linux/ratelimit.h>
11 #include <linux/vmalloc.h>
12 #include <scsi/scsi_tcq.h>
13 #include <linux/utsname.h>
14
15
16 /* QLAFX00 specific Mailbox implementation functions */
17
18 /*
19 * qlafx00_mailbox_command
20 * Issue mailbox command and waits for completion.
21 *
22 * Input:
23 * ha = adapter block pointer.
24 * mcp = driver internal mbx struct pointer.
25 *
26 * Output:
27 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
28 *
29 * Returns:
30 * 0 : QLA_SUCCESS = cmd performed success
31 * 1 : QLA_FUNCTION_FAILED (error encountered)
32 * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
33 *
34 * Context:
35 * Kernel context.
36 */
37 static int
qlafx00_mailbox_command(scsi_qla_host_t * vha,struct mbx_cmd_32 * mcp)38 qlafx00_mailbox_command(scsi_qla_host_t *vha, struct mbx_cmd_32 *mcp)
39
40 {
41 int rval;
42 unsigned long flags = 0;
43 device_reg_t *reg;
44 uint8_t abort_active;
45 uint8_t io_lock_on;
46 uint16_t command = 0;
47 uint32_t *iptr;
48 uint32_t __iomem *optr;
49 uint32_t cnt;
50 uint32_t mboxes;
51 unsigned long wait_time;
52 struct qla_hw_data *ha = vha->hw;
53 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
54
55 if (ha->pdev->error_state > pci_channel_io_frozen) {
56 ql_log(ql_log_warn, vha, 0x115c,
57 "error_state is greater than pci_channel_io_frozen, "
58 "exiting.\n");
59 return QLA_FUNCTION_TIMEOUT;
60 }
61
62 if (vha->device_flags & DFLG_DEV_FAILED) {
63 ql_log(ql_log_warn, vha, 0x115f,
64 "Device in failed state, exiting.\n");
65 return QLA_FUNCTION_TIMEOUT;
66 }
67
68 reg = ha->iobase;
69 io_lock_on = base_vha->flags.init_done;
70
71 rval = QLA_SUCCESS;
72 abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
73
74 if (ha->flags.pci_channel_io_perm_failure) {
75 ql_log(ql_log_warn, vha, 0x1175,
76 "Perm failure on EEH timeout MBX, exiting.\n");
77 return QLA_FUNCTION_TIMEOUT;
78 }
79
80 if (ha->flags.isp82xx_fw_hung) {
81 /* Setting Link-Down error */
82 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
83 ql_log(ql_log_warn, vha, 0x1176,
84 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
85 rval = QLA_FUNCTION_FAILED;
86 goto premature_exit;
87 }
88
89 /*
90 * Wait for active mailbox commands to finish by waiting at most tov
91 * seconds. This is to serialize actual issuing of mailbox cmds during
92 * non ISP abort time.
93 */
94 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
95 /* Timeout occurred. Return error. */
96 ql_log(ql_log_warn, vha, 0x1177,
97 "Cmd access timeout, cmd=0x%x, Exiting.\n",
98 mcp->mb[0]);
99 return QLA_FUNCTION_TIMEOUT;
100 }
101
102 ha->flags.mbox_busy = 1;
103 /* Save mailbox command for debug */
104 ha->mcp32 = mcp;
105
106 ql_dbg(ql_dbg_mbx, vha, 0x1178,
107 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
108
109 spin_lock_irqsave(&ha->hardware_lock, flags);
110
111 /* Load mailbox registers. */
112 optr = (uint32_t __iomem *)®->ispfx00.mailbox0;
113
114 iptr = mcp->mb;
115 command = mcp->mb[0];
116 mboxes = mcp->out_mb;
117
118 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
119 if (mboxes & BIT_0)
120 WRT_REG_DWORD(optr, *iptr);
121
122 mboxes >>= 1;
123 optr++;
124 iptr++;
125 }
126
127 /* Issue set host interrupt command to send cmd out. */
128 ha->flags.mbox_int = 0;
129 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
130
131 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1172,
132 (uint8_t *)mcp->mb, 16);
133 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1173,
134 ((uint8_t *)mcp->mb + 0x10), 16);
135 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1174,
136 ((uint8_t *)mcp->mb + 0x20), 8);
137
138 /* Unlock mbx registers and wait for interrupt */
139 ql_dbg(ql_dbg_mbx, vha, 0x1179,
140 "Going to unlock irq & waiting for interrupts. "
141 "jiffies=%lx.\n", jiffies);
142
143 /* Wait for mbx cmd completion until timeout */
144 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
145 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
146
147 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code);
148 spin_unlock_irqrestore(&ha->hardware_lock, flags);
149
150 wait_for_completion_timeout(&ha->mbx_intr_comp, mcp->tov * HZ);
151 } else {
152 ql_dbg(ql_dbg_mbx, vha, 0x112c,
153 "Cmd=%x Polling Mode.\n", command);
154
155 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code);
156 spin_unlock_irqrestore(&ha->hardware_lock, flags);
157
158 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
159 while (!ha->flags.mbox_int) {
160 if (time_after(jiffies, wait_time))
161 break;
162
163 /* Check for pending interrupts. */
164 qla2x00_poll(ha->rsp_q_map[0]);
165
166 if (!ha->flags.mbox_int &&
167 !(IS_QLA2200(ha) &&
168 command == MBC_LOAD_RISC_RAM_EXTENDED))
169 usleep_range(10000, 11000);
170 } /* while */
171 ql_dbg(ql_dbg_mbx, vha, 0x112d,
172 "Waited %d sec.\n",
173 (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
174 }
175
176 /* Check whether we timed out */
177 if (ha->flags.mbox_int) {
178 uint32_t *iptr2;
179
180 ql_dbg(ql_dbg_mbx, vha, 0x112e,
181 "Cmd=%x completed.\n", command);
182
183 /* Got interrupt. Clear the flag. */
184 ha->flags.mbox_int = 0;
185 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
186
187 if (ha->mailbox_out32[0] != MBS_COMMAND_COMPLETE)
188 rval = QLA_FUNCTION_FAILED;
189
190 /* Load return mailbox registers. */
191 iptr2 = mcp->mb;
192 iptr = (uint32_t *)&ha->mailbox_out32[0];
193 mboxes = mcp->in_mb;
194 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
195 if (mboxes & BIT_0)
196 *iptr2 = *iptr;
197
198 mboxes >>= 1;
199 iptr2++;
200 iptr++;
201 }
202 } else {
203
204 rval = QLA_FUNCTION_TIMEOUT;
205 }
206
207 ha->flags.mbox_busy = 0;
208
209 /* Clean up */
210 ha->mcp32 = NULL;
211
212 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
213 ql_dbg(ql_dbg_mbx, vha, 0x113a,
214 "checking for additional resp interrupt.\n");
215
216 /* polling mode for non isp_abort commands. */
217 qla2x00_poll(ha->rsp_q_map[0]);
218 }
219
220 if (rval == QLA_FUNCTION_TIMEOUT &&
221 mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
222 if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
223 ha->flags.eeh_busy) {
224 /* not in dpc. schedule it for dpc to take over. */
225 ql_dbg(ql_dbg_mbx, vha, 0x115d,
226 "Timeout, schedule isp_abort_needed.\n");
227
228 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
229 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
230 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
231
232 ql_log(ql_log_info, base_vha, 0x115e,
233 "Mailbox cmd timeout occurred, cmd=0x%x, "
234 "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
235 "abort.\n", command, mcp->mb[0],
236 ha->flags.eeh_busy);
237 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
238 qla2xxx_wake_dpc(vha);
239 }
240 } else if (!abort_active) {
241 /* call abort directly since we are in the DPC thread */
242 ql_dbg(ql_dbg_mbx, vha, 0x1160,
243 "Timeout, calling abort_isp.\n");
244
245 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
246 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
247 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
248
249 ql_log(ql_log_info, base_vha, 0x1161,
250 "Mailbox cmd timeout occurred, cmd=0x%x, "
251 "mb[0]=0x%x. Scheduling ISP abort ",
252 command, mcp->mb[0]);
253
254 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
255 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
256 if (ha->isp_ops->abort_isp(vha)) {
257 /* Failed. retry later. */
258 set_bit(ISP_ABORT_NEEDED,
259 &vha->dpc_flags);
260 }
261 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
262 ql_dbg(ql_dbg_mbx, vha, 0x1162,
263 "Finished abort_isp.\n");
264 }
265 }
266 }
267
268 premature_exit:
269 /* Allow next mbx cmd to come in. */
270 complete(&ha->mbx_cmd_comp);
271
272 if (rval) {
273 ql_log(ql_log_warn, base_vha, 0x1163,
274 "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, "
275 "mb[3]=%x, cmd=%x ****.\n",
276 mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command);
277 } else {
278 ql_dbg(ql_dbg_mbx, base_vha, 0x1164, "Done %s.\n", __func__);
279 }
280
281 return rval;
282 }
283
284 /*
285 * qlafx00_driver_shutdown
286 * Indicate a driver shutdown to firmware.
287 *
288 * Input:
289 * ha = adapter block pointer.
290 *
291 * Returns:
292 * local function return status code.
293 *
294 * Context:
295 * Kernel context.
296 */
297 int
qlafx00_driver_shutdown(scsi_qla_host_t * vha,int tmo)298 qlafx00_driver_shutdown(scsi_qla_host_t *vha, int tmo)
299 {
300 int rval;
301 struct mbx_cmd_32 mc;
302 struct mbx_cmd_32 *mcp = &mc;
303
304 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1166,
305 "Entered %s.\n", __func__);
306
307 mcp->mb[0] = MBC_MR_DRV_SHUTDOWN;
308 mcp->out_mb = MBX_0;
309 mcp->in_mb = MBX_0;
310 if (tmo)
311 mcp->tov = tmo;
312 else
313 mcp->tov = MBX_TOV_SECONDS;
314 mcp->flags = 0;
315 rval = qlafx00_mailbox_command(vha, mcp);
316
317 if (rval != QLA_SUCCESS) {
318 ql_dbg(ql_dbg_mbx, vha, 0x1167,
319 "Failed=%x.\n", rval);
320 } else {
321 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1168,
322 "Done %s.\n", __func__);
323 }
324
325 return rval;
326 }
327
328 /*
329 * qlafx00_get_firmware_state
330 * Get adapter firmware state.
331 *
332 * Input:
333 * ha = adapter block pointer.
334 * TARGET_QUEUE_LOCK must be released.
335 * ADAPTER_STATE_LOCK must be released.
336 *
337 * Returns:
338 * qla7xxx local function return status code.
339 *
340 * Context:
341 * Kernel context.
342 */
343 static int
qlafx00_get_firmware_state(scsi_qla_host_t * vha,uint32_t * states)344 qlafx00_get_firmware_state(scsi_qla_host_t *vha, uint32_t *states)
345 {
346 int rval;
347 struct mbx_cmd_32 mc;
348 struct mbx_cmd_32 *mcp = &mc;
349
350 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1169,
351 "Entered %s.\n", __func__);
352
353 mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
354 mcp->out_mb = MBX_0;
355 mcp->in_mb = MBX_1|MBX_0;
356 mcp->tov = MBX_TOV_SECONDS;
357 mcp->flags = 0;
358 rval = qlafx00_mailbox_command(vha, mcp);
359
360 /* Return firmware states. */
361 states[0] = mcp->mb[1];
362
363 if (rval != QLA_SUCCESS) {
364 ql_dbg(ql_dbg_mbx, vha, 0x116a,
365 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
366 } else {
367 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116b,
368 "Done %s.\n", __func__);
369 }
370 return rval;
371 }
372
373 /*
374 * qlafx00_init_firmware
375 * Initialize adapter firmware.
376 *
377 * Input:
378 * ha = adapter block pointer.
379 * dptr = Initialization control block pointer.
380 * size = size of initialization control block.
381 * TARGET_QUEUE_LOCK must be released.
382 * ADAPTER_STATE_LOCK must be released.
383 *
384 * Returns:
385 * qlafx00 local function return status code.
386 *
387 * Context:
388 * Kernel context.
389 */
390 int
qlafx00_init_firmware(scsi_qla_host_t * vha,uint16_t size)391 qlafx00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
392 {
393 int rval;
394 struct mbx_cmd_32 mc;
395 struct mbx_cmd_32 *mcp = &mc;
396 struct qla_hw_data *ha = vha->hw;
397
398 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116c,
399 "Entered %s.\n", __func__);
400
401 mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
402
403 mcp->mb[1] = 0;
404 mcp->mb[2] = MSD(ha->init_cb_dma);
405 mcp->mb[3] = LSD(ha->init_cb_dma);
406
407 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
408 mcp->in_mb = MBX_0;
409 mcp->buf_size = size;
410 mcp->flags = MBX_DMA_OUT;
411 mcp->tov = MBX_TOV_SECONDS;
412 rval = qlafx00_mailbox_command(vha, mcp);
413
414 if (rval != QLA_SUCCESS) {
415 ql_dbg(ql_dbg_mbx, vha, 0x116d,
416 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
417 } else {
418 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116e,
419 "Done %s.\n", __func__);
420 }
421 return rval;
422 }
423
424 /*
425 * qlafx00_mbx_reg_test
426 */
427 static int
qlafx00_mbx_reg_test(scsi_qla_host_t * vha)428 qlafx00_mbx_reg_test(scsi_qla_host_t *vha)
429 {
430 int rval;
431 struct mbx_cmd_32 mc;
432 struct mbx_cmd_32 *mcp = &mc;
433
434 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116f,
435 "Entered %s.\n", __func__);
436
437
438 mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
439 mcp->mb[1] = 0xAAAA;
440 mcp->mb[2] = 0x5555;
441 mcp->mb[3] = 0xAA55;
442 mcp->mb[4] = 0x55AA;
443 mcp->mb[5] = 0xA5A5;
444 mcp->mb[6] = 0x5A5A;
445 mcp->mb[7] = 0x2525;
446 mcp->mb[8] = 0xBBBB;
447 mcp->mb[9] = 0x6666;
448 mcp->mb[10] = 0xBB66;
449 mcp->mb[11] = 0x66BB;
450 mcp->mb[12] = 0xB6B6;
451 mcp->mb[13] = 0x6B6B;
452 mcp->mb[14] = 0x3636;
453 mcp->mb[15] = 0xCCCC;
454
455
456 mcp->out_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
457 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
458 mcp->in_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
459 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
460 mcp->buf_size = 0;
461 mcp->flags = MBX_DMA_OUT;
462 mcp->tov = MBX_TOV_SECONDS;
463 rval = qlafx00_mailbox_command(vha, mcp);
464 if (rval == QLA_SUCCESS) {
465 if (mcp->mb[17] != 0xAAAA || mcp->mb[18] != 0x5555 ||
466 mcp->mb[19] != 0xAA55 || mcp->mb[20] != 0x55AA)
467 rval = QLA_FUNCTION_FAILED;
468 if (mcp->mb[21] != 0xA5A5 || mcp->mb[22] != 0x5A5A ||
469 mcp->mb[23] != 0x2525 || mcp->mb[24] != 0xBBBB)
470 rval = QLA_FUNCTION_FAILED;
471 if (mcp->mb[25] != 0x6666 || mcp->mb[26] != 0xBB66 ||
472 mcp->mb[27] != 0x66BB || mcp->mb[28] != 0xB6B6)
473 rval = QLA_FUNCTION_FAILED;
474 if (mcp->mb[29] != 0x6B6B || mcp->mb[30] != 0x3636 ||
475 mcp->mb[31] != 0xCCCC)
476 rval = QLA_FUNCTION_FAILED;
477 }
478
479 if (rval != QLA_SUCCESS) {
480 ql_dbg(ql_dbg_mbx, vha, 0x1170,
481 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
482 } else {
483 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1171,
484 "Done %s.\n", __func__);
485 }
486 return rval;
487 }
488
489 /**
490 * qlafx00_pci_config() - Setup ISPFx00 PCI configuration registers.
491 * @ha: HA context
492 *
493 * Returns 0 on success.
494 */
495 int
qlafx00_pci_config(scsi_qla_host_t * vha)496 qlafx00_pci_config(scsi_qla_host_t *vha)
497 {
498 uint16_t w;
499 struct qla_hw_data *ha = vha->hw;
500
501 pci_set_master(ha->pdev);
502 pci_try_set_mwi(ha->pdev);
503
504 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
505 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
506 w &= ~PCI_COMMAND_INTX_DISABLE;
507 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
508
509 /* PCIe -- adjust Maximum Read Request Size (2048). */
510 if (pci_is_pcie(ha->pdev))
511 pcie_set_readrq(ha->pdev, 2048);
512
513 ha->chip_revision = ha->pdev->revision;
514
515 return QLA_SUCCESS;
516 }
517
518 /**
519 * qlafx00_warm_reset() - Perform warm reset of iSA(CPUs being reset on SOC).
520 * @ha: HA context
521 *
522 */
523 static inline void
qlafx00_soc_cpu_reset(scsi_qla_host_t * vha)524 qlafx00_soc_cpu_reset(scsi_qla_host_t *vha)
525 {
526 unsigned long flags = 0;
527 struct qla_hw_data *ha = vha->hw;
528 int i, core;
529 uint32_t cnt;
530 uint32_t reg_val;
531
532 spin_lock_irqsave(&ha->hardware_lock, flags);
533
534 QLAFX00_SET_HBA_SOC_REG(ha, 0x80004, 0);
535 QLAFX00_SET_HBA_SOC_REG(ha, 0x82004, 0);
536
537 /* stop the XOR DMA engines */
538 QLAFX00_SET_HBA_SOC_REG(ha, 0x60920, 0x02);
539 QLAFX00_SET_HBA_SOC_REG(ha, 0x60924, 0x02);
540 QLAFX00_SET_HBA_SOC_REG(ha, 0xf0920, 0x02);
541 QLAFX00_SET_HBA_SOC_REG(ha, 0xf0924, 0x02);
542
543 /* stop the IDMA engines */
544 reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x60840);
545 reg_val &= ~(1<<12);
546 QLAFX00_SET_HBA_SOC_REG(ha, 0x60840, reg_val);
547
548 reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x60844);
549 reg_val &= ~(1<<12);
550 QLAFX00_SET_HBA_SOC_REG(ha, 0x60844, reg_val);
551
552 reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x60848);
553 reg_val &= ~(1<<12);
554 QLAFX00_SET_HBA_SOC_REG(ha, 0x60848, reg_val);
555
556 reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x6084C);
557 reg_val &= ~(1<<12);
558 QLAFX00_SET_HBA_SOC_REG(ha, 0x6084C, reg_val);
559
560 for (i = 0; i < 100000; i++) {
561 if ((QLAFX00_GET_HBA_SOC_REG(ha, 0xd0000) & 0x10000000) == 0 &&
562 (QLAFX00_GET_HBA_SOC_REG(ha, 0x10600) & 0x1) == 0)
563 break;
564 udelay(100);
565 }
566
567 /* Set all 4 cores in reset */
568 for (i = 0; i < 4; i++) {
569 QLAFX00_SET_HBA_SOC_REG(ha,
570 (SOC_SW_RST_CONTROL_REG_CORE0 + 8*i), (0xF01));
571 QLAFX00_SET_HBA_SOC_REG(ha,
572 (SOC_SW_RST_CONTROL_REG_CORE0 + 4 + 8*i), (0x01010101));
573 }
574
575 /* Reset all units in Fabric */
576 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x011f0101));
577
578 /* */
579 QLAFX00_SET_HBA_SOC_REG(ha, 0x10610, 1);
580 QLAFX00_SET_HBA_SOC_REG(ha, 0x10600, 0);
581
582 /* Set all 4 core Memory Power Down Registers */
583 for (i = 0; i < 5; i++) {
584 QLAFX00_SET_HBA_SOC_REG(ha,
585 (SOC_PWR_MANAGEMENT_PWR_DOWN_REG + 4*i), (0x0));
586 }
587
588 /* Reset all interrupt control registers */
589 for (i = 0; i < 115; i++) {
590 QLAFX00_SET_HBA_SOC_REG(ha,
591 (SOC_INTERRUPT_SOURCE_I_CONTROL_REG + 4*i), (0x0));
592 }
593
594 /* Reset Timers control registers. per core */
595 for (core = 0; core < 4; core++)
596 for (i = 0; i < 8; i++)
597 QLAFX00_SET_HBA_SOC_REG(ha,
598 (SOC_CORE_TIMER_REG + 0x100*core + 4*i), (0x0));
599
600 /* Reset per core IRQ ack register */
601 for (core = 0; core < 4; core++)
602 QLAFX00_SET_HBA_SOC_REG(ha,
603 (SOC_IRQ_ACK_REG + 0x100*core), (0x3FF));
604
605 /* Set Fabric control and config to defaults */
606 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONTROL_REG, (0x2));
607 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONFIG_REG, (0x3));
608
609 /* Kick in Fabric units */
610 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x0));
611
612 /* Kick in Core0 to start boot process */
613 QLAFX00_SET_HBA_SOC_REG(ha, SOC_SW_RST_CONTROL_REG_CORE0, (0xF00));
614
615 spin_unlock_irqrestore(&ha->hardware_lock, flags);
616
617 /* Wait 10secs for soft-reset to complete. */
618 for (cnt = 10; cnt; cnt--) {
619 msleep(1000);
620 barrier();
621 }
622 }
623
624 /**
625 * qlafx00_soft_reset() - Soft Reset ISPFx00.
626 * @ha: HA context
627 *
628 * Returns 0 on success.
629 */
630 void
qlafx00_soft_reset(scsi_qla_host_t * vha)631 qlafx00_soft_reset(scsi_qla_host_t *vha)
632 {
633 struct qla_hw_data *ha = vha->hw;
634
635 if (unlikely(pci_channel_offline(ha->pdev) &&
636 ha->flags.pci_channel_io_perm_failure))
637 return;
638
639 ha->isp_ops->disable_intrs(ha);
640 qlafx00_soc_cpu_reset(vha);
641 }
642
643 /**
644 * qlafx00_chip_diag() - Test ISPFx00 for proper operation.
645 * @ha: HA context
646 *
647 * Returns 0 on success.
648 */
649 int
qlafx00_chip_diag(scsi_qla_host_t * vha)650 qlafx00_chip_diag(scsi_qla_host_t *vha)
651 {
652 int rval = 0;
653 struct qla_hw_data *ha = vha->hw;
654 struct req_que *req = ha->req_q_map[0];
655
656 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
657
658 rval = qlafx00_mbx_reg_test(vha);
659 if (rval) {
660 ql_log(ql_log_warn, vha, 0x1165,
661 "Failed mailbox send register test\n");
662 } else {
663 /* Flag a successful rval */
664 rval = QLA_SUCCESS;
665 }
666 return rval;
667 }
668
669 void
qlafx00_config_rings(struct scsi_qla_host * vha)670 qlafx00_config_rings(struct scsi_qla_host *vha)
671 {
672 struct qla_hw_data *ha = vha->hw;
673 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
674
675 WRT_REG_DWORD(®->req_q_in, 0);
676 WRT_REG_DWORD(®->req_q_out, 0);
677
678 WRT_REG_DWORD(®->rsp_q_in, 0);
679 WRT_REG_DWORD(®->rsp_q_out, 0);
680
681 /* PCI posting */
682 RD_REG_DWORD(®->rsp_q_out);
683 }
684
685 char *
qlafx00_pci_info_str(struct scsi_qla_host * vha,char * str)686 qlafx00_pci_info_str(struct scsi_qla_host *vha, char *str)
687 {
688 struct qla_hw_data *ha = vha->hw;
689
690 if (pci_is_pcie(ha->pdev)) {
691 strcpy(str, "PCIe iSA");
692 return str;
693 }
694 return str;
695 }
696
697 char *
qlafx00_fw_version_str(struct scsi_qla_host * vha,char * str,size_t size)698 qlafx00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
699 {
700 struct qla_hw_data *ha = vha->hw;
701
702 snprintf(str, size, "%s", ha->mr.fw_version);
703 return str;
704 }
705
706 void
qlafx00_enable_intrs(struct qla_hw_data * ha)707 qlafx00_enable_intrs(struct qla_hw_data *ha)
708 {
709 unsigned long flags = 0;
710
711 spin_lock_irqsave(&ha->hardware_lock, flags);
712 ha->interrupts_on = 1;
713 QLAFX00_ENABLE_ICNTRL_REG(ha);
714 spin_unlock_irqrestore(&ha->hardware_lock, flags);
715 }
716
717 void
qlafx00_disable_intrs(struct qla_hw_data * ha)718 qlafx00_disable_intrs(struct qla_hw_data *ha)
719 {
720 unsigned long flags = 0;
721
722 spin_lock_irqsave(&ha->hardware_lock, flags);
723 ha->interrupts_on = 0;
724 QLAFX00_DISABLE_ICNTRL_REG(ha);
725 spin_unlock_irqrestore(&ha->hardware_lock, flags);
726 }
727
728 int
qlafx00_abort_target(fc_port_t * fcport,uint64_t l,int tag)729 qlafx00_abort_target(fc_port_t *fcport, uint64_t l, int tag)
730 {
731 return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
732 }
733
734 int
qlafx00_lun_reset(fc_port_t * fcport,uint64_t l,int tag)735 qlafx00_lun_reset(fc_port_t *fcport, uint64_t l, int tag)
736 {
737 return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
738 }
739
740 int
qlafx00_iospace_config(struct qla_hw_data * ha)741 qlafx00_iospace_config(struct qla_hw_data *ha)
742 {
743 if (pci_request_selected_regions(ha->pdev, ha->bars,
744 QLA2XXX_DRIVER_NAME)) {
745 ql_log_pci(ql_log_fatal, ha->pdev, 0x014e,
746 "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
747 pci_name(ha->pdev));
748 goto iospace_error_exit;
749 }
750
751 /* Use MMIO operations for all accesses. */
752 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
753 ql_log_pci(ql_log_warn, ha->pdev, 0x014f,
754 "Invalid pci I/O region size (%s).\n",
755 pci_name(ha->pdev));
756 goto iospace_error_exit;
757 }
758 if (pci_resource_len(ha->pdev, 0) < BAR0_LEN_FX00) {
759 ql_log_pci(ql_log_warn, ha->pdev, 0x0127,
760 "Invalid PCI mem BAR0 region size (%s), aborting\n",
761 pci_name(ha->pdev));
762 goto iospace_error_exit;
763 }
764
765 ha->cregbase =
766 ioremap_nocache(pci_resource_start(ha->pdev, 0), BAR0_LEN_FX00);
767 if (!ha->cregbase) {
768 ql_log_pci(ql_log_fatal, ha->pdev, 0x0128,
769 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
770 goto iospace_error_exit;
771 }
772
773 if (!(pci_resource_flags(ha->pdev, 2) & IORESOURCE_MEM)) {
774 ql_log_pci(ql_log_warn, ha->pdev, 0x0129,
775 "region #2 not an MMIO resource (%s), aborting\n",
776 pci_name(ha->pdev));
777 goto iospace_error_exit;
778 }
779 if (pci_resource_len(ha->pdev, 2) < BAR2_LEN_FX00) {
780 ql_log_pci(ql_log_warn, ha->pdev, 0x012a,
781 "Invalid PCI mem BAR2 region size (%s), aborting\n",
782 pci_name(ha->pdev));
783 goto iospace_error_exit;
784 }
785
786 ha->iobase =
787 ioremap_nocache(pci_resource_start(ha->pdev, 2), BAR2_LEN_FX00);
788 if (!ha->iobase) {
789 ql_log_pci(ql_log_fatal, ha->pdev, 0x012b,
790 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
791 goto iospace_error_exit;
792 }
793
794 /* Determine queue resources */
795 ha->max_req_queues = ha->max_rsp_queues = 1;
796
797 ql_log_pci(ql_log_info, ha->pdev, 0x012c,
798 "Bars 0x%x, iobase0 0x%p, iobase2 0x%p\n",
799 ha->bars, ha->cregbase, ha->iobase);
800
801 return 0;
802
803 iospace_error_exit:
804 return -ENOMEM;
805 }
806
807 static void
qlafx00_save_queue_ptrs(struct scsi_qla_host * vha)808 qlafx00_save_queue_ptrs(struct scsi_qla_host *vha)
809 {
810 struct qla_hw_data *ha = vha->hw;
811 struct req_que *req = ha->req_q_map[0];
812 struct rsp_que *rsp = ha->rsp_q_map[0];
813
814 req->length_fx00 = req->length;
815 req->ring_fx00 = req->ring;
816 req->dma_fx00 = req->dma;
817
818 rsp->length_fx00 = rsp->length;
819 rsp->ring_fx00 = rsp->ring;
820 rsp->dma_fx00 = rsp->dma;
821
822 ql_dbg(ql_dbg_init, vha, 0x012d,
823 "req: %p, ring_fx00: %p, length_fx00: 0x%x,"
824 "req->dma_fx00: 0x%llx\n", req, req->ring_fx00,
825 req->length_fx00, (u64)req->dma_fx00);
826
827 ql_dbg(ql_dbg_init, vha, 0x012e,
828 "rsp: %p, ring_fx00: %p, length_fx00: 0x%x,"
829 "rsp->dma_fx00: 0x%llx\n", rsp, rsp->ring_fx00,
830 rsp->length_fx00, (u64)rsp->dma_fx00);
831 }
832
833 static int
qlafx00_config_queues(struct scsi_qla_host * vha)834 qlafx00_config_queues(struct scsi_qla_host *vha)
835 {
836 struct qla_hw_data *ha = vha->hw;
837 struct req_que *req = ha->req_q_map[0];
838 struct rsp_que *rsp = ha->rsp_q_map[0];
839 dma_addr_t bar2_hdl = pci_resource_start(ha->pdev, 2);
840
841 req->length = ha->req_que_len;
842 req->ring = (void __force *)ha->iobase + ha->req_que_off;
843 req->dma = bar2_hdl + ha->req_que_off;
844 if ((!req->ring) || (req->length == 0)) {
845 ql_log_pci(ql_log_info, ha->pdev, 0x012f,
846 "Unable to allocate memory for req_ring\n");
847 return QLA_FUNCTION_FAILED;
848 }
849
850 ql_dbg(ql_dbg_init, vha, 0x0130,
851 "req: %p req_ring pointer %p req len 0x%x "
852 "req off 0x%x\n, req->dma: 0x%llx",
853 req, req->ring, req->length,
854 ha->req_que_off, (u64)req->dma);
855
856 rsp->length = ha->rsp_que_len;
857 rsp->ring = (void __force *)ha->iobase + ha->rsp_que_off;
858 rsp->dma = bar2_hdl + ha->rsp_que_off;
859 if ((!rsp->ring) || (rsp->length == 0)) {
860 ql_log_pci(ql_log_info, ha->pdev, 0x0131,
861 "Unable to allocate memory for rsp_ring\n");
862 return QLA_FUNCTION_FAILED;
863 }
864
865 ql_dbg(ql_dbg_init, vha, 0x0132,
866 "rsp: %p rsp_ring pointer %p rsp len 0x%x "
867 "rsp off 0x%x, rsp->dma: 0x%llx\n",
868 rsp, rsp->ring, rsp->length,
869 ha->rsp_que_off, (u64)rsp->dma);
870
871 return QLA_SUCCESS;
872 }
873
874 static int
qlafx00_init_fw_ready(scsi_qla_host_t * vha)875 qlafx00_init_fw_ready(scsi_qla_host_t *vha)
876 {
877 int rval = 0;
878 unsigned long wtime;
879 uint16_t wait_time; /* Wait time */
880 struct qla_hw_data *ha = vha->hw;
881 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
882 uint32_t aenmbx, aenmbx7 = 0;
883 uint32_t pseudo_aen;
884 uint32_t state[5];
885 bool done = false;
886
887 /* 30 seconds wait - Adjust if required */
888 wait_time = 30;
889
890 pseudo_aen = RD_REG_DWORD(®->pseudoaen);
891 if (pseudo_aen == 1) {
892 aenmbx7 = RD_REG_DWORD(®->initval7);
893 ha->mbx_intr_code = MSW(aenmbx7);
894 ha->rqstq_intr_code = LSW(aenmbx7);
895 rval = qlafx00_driver_shutdown(vha, 10);
896 if (rval != QLA_SUCCESS)
897 qlafx00_soft_reset(vha);
898 }
899
900 /* wait time before firmware ready */
901 wtime = jiffies + (wait_time * HZ);
902 do {
903 aenmbx = RD_REG_DWORD(®->aenmailbox0);
904 barrier();
905 ql_dbg(ql_dbg_mbx, vha, 0x0133,
906 "aenmbx: 0x%x\n", aenmbx);
907
908 switch (aenmbx) {
909 case MBA_FW_NOT_STARTED:
910 case MBA_FW_STARTING:
911 break;
912
913 case MBA_SYSTEM_ERR:
914 case MBA_REQ_TRANSFER_ERR:
915 case MBA_RSP_TRANSFER_ERR:
916 case MBA_FW_INIT_FAILURE:
917 qlafx00_soft_reset(vha);
918 break;
919
920 case MBA_FW_RESTART_CMPLT:
921 /* Set the mbx and rqstq intr code */
922 aenmbx7 = RD_REG_DWORD(®->aenmailbox7);
923 ha->mbx_intr_code = MSW(aenmbx7);
924 ha->rqstq_intr_code = LSW(aenmbx7);
925 ha->req_que_off = RD_REG_DWORD(®->aenmailbox1);
926 ha->rsp_que_off = RD_REG_DWORD(®->aenmailbox3);
927 ha->req_que_len = RD_REG_DWORD(®->aenmailbox5);
928 ha->rsp_que_len = RD_REG_DWORD(®->aenmailbox6);
929 WRT_REG_DWORD(®->aenmailbox0, 0);
930 RD_REG_DWORD_RELAXED(®->aenmailbox0);
931 ql_dbg(ql_dbg_init, vha, 0x0134,
932 "f/w returned mbx_intr_code: 0x%x, "
933 "rqstq_intr_code: 0x%x\n",
934 ha->mbx_intr_code, ha->rqstq_intr_code);
935 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
936 rval = QLA_SUCCESS;
937 done = true;
938 break;
939
940 default:
941 if ((aenmbx & 0xFF00) == MBA_FW_INIT_INPROGRESS)
942 break;
943
944 /* If fw is apparently not ready. In order to continue,
945 * we might need to issue Mbox cmd, but the problem is
946 * that the DoorBell vector values that come with the
947 * 8060 AEN are most likely gone by now (and thus no
948 * bell would be rung on the fw side when mbox cmd is
949 * issued). We have to therefore grab the 8060 AEN
950 * shadow regs (filled in by FW when the last 8060
951 * AEN was being posted).
952 * Do the following to determine what is needed in
953 * order to get the FW ready:
954 * 1. reload the 8060 AEN values from the shadow regs
955 * 2. clear int status to get rid of possible pending
956 * interrupts
957 * 3. issue Get FW State Mbox cmd to determine fw state
958 * Set the mbx and rqstq intr code from Shadow Regs
959 */
960 aenmbx7 = RD_REG_DWORD(®->initval7);
961 ha->mbx_intr_code = MSW(aenmbx7);
962 ha->rqstq_intr_code = LSW(aenmbx7);
963 ha->req_que_off = RD_REG_DWORD(®->initval1);
964 ha->rsp_que_off = RD_REG_DWORD(®->initval3);
965 ha->req_que_len = RD_REG_DWORD(®->initval5);
966 ha->rsp_que_len = RD_REG_DWORD(®->initval6);
967 ql_dbg(ql_dbg_init, vha, 0x0135,
968 "f/w returned mbx_intr_code: 0x%x, "
969 "rqstq_intr_code: 0x%x\n",
970 ha->mbx_intr_code, ha->rqstq_intr_code);
971 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
972
973 /* Get the FW state */
974 rval = qlafx00_get_firmware_state(vha, state);
975 if (rval != QLA_SUCCESS) {
976 /* Retry if timer has not expired */
977 break;
978 }
979
980 if (state[0] == FSTATE_FX00_CONFIG_WAIT) {
981 /* Firmware is waiting to be
982 * initialized by driver
983 */
984 rval = QLA_SUCCESS;
985 done = true;
986 break;
987 }
988
989 /* Issue driver shutdown and wait until f/w recovers.
990 * Driver should continue to poll until 8060 AEN is
991 * received indicating firmware recovery.
992 */
993 ql_dbg(ql_dbg_init, vha, 0x0136,
994 "Sending Driver shutdown fw_state 0x%x\n",
995 state[0]);
996
997 rval = qlafx00_driver_shutdown(vha, 10);
998 if (rval != QLA_SUCCESS) {
999 rval = QLA_FUNCTION_FAILED;
1000 break;
1001 }
1002 msleep(500);
1003
1004 wtime = jiffies + (wait_time * HZ);
1005 break;
1006 }
1007
1008 if (!done) {
1009 if (time_after_eq(jiffies, wtime)) {
1010 ql_dbg(ql_dbg_init, vha, 0x0137,
1011 "Init f/w failed: aen[7]: 0x%x\n",
1012 RD_REG_DWORD(®->aenmailbox7));
1013 rval = QLA_FUNCTION_FAILED;
1014 done = true;
1015 break;
1016 }
1017 /* Delay for a while */
1018 msleep(500);
1019 }
1020 } while (!done);
1021
1022 if (rval)
1023 ql_dbg(ql_dbg_init, vha, 0x0138,
1024 "%s **** FAILED ****.\n", __func__);
1025 else
1026 ql_dbg(ql_dbg_init, vha, 0x0139,
1027 "%s **** SUCCESS ****.\n", __func__);
1028
1029 return rval;
1030 }
1031
1032 /*
1033 * qlafx00_fw_ready() - Waits for firmware ready.
1034 * @ha: HA context
1035 *
1036 * Returns 0 on success.
1037 */
1038 int
qlafx00_fw_ready(scsi_qla_host_t * vha)1039 qlafx00_fw_ready(scsi_qla_host_t *vha)
1040 {
1041 int rval;
1042 unsigned long wtime;
1043 uint16_t wait_time; /* Wait time if loop is coming ready */
1044 uint32_t state[5];
1045
1046 rval = QLA_SUCCESS;
1047
1048 wait_time = 10;
1049
1050 /* wait time before firmware ready */
1051 wtime = jiffies + (wait_time * HZ);
1052
1053 /* Wait for ISP to finish init */
1054 if (!vha->flags.init_done)
1055 ql_dbg(ql_dbg_init, vha, 0x013a,
1056 "Waiting for init to complete...\n");
1057
1058 do {
1059 rval = qlafx00_get_firmware_state(vha, state);
1060
1061 if (rval == QLA_SUCCESS) {
1062 if (state[0] == FSTATE_FX00_INITIALIZED) {
1063 ql_dbg(ql_dbg_init, vha, 0x013b,
1064 "fw_state=%x\n", state[0]);
1065 rval = QLA_SUCCESS;
1066 break;
1067 }
1068 }
1069 rval = QLA_FUNCTION_FAILED;
1070
1071 if (time_after_eq(jiffies, wtime))
1072 break;
1073
1074 /* Delay for a while */
1075 msleep(500);
1076
1077 ql_dbg(ql_dbg_init, vha, 0x013c,
1078 "fw_state=%x curr time=%lx.\n", state[0], jiffies);
1079 } while (1);
1080
1081
1082 if (rval)
1083 ql_dbg(ql_dbg_init, vha, 0x013d,
1084 "Firmware ready **** FAILED ****.\n");
1085 else
1086 ql_dbg(ql_dbg_init, vha, 0x013e,
1087 "Firmware ready **** SUCCESS ****.\n");
1088
1089 return rval;
1090 }
1091
1092 static int
qlafx00_find_all_targets(scsi_qla_host_t * vha,struct list_head * new_fcports)1093 qlafx00_find_all_targets(scsi_qla_host_t *vha,
1094 struct list_head *new_fcports)
1095 {
1096 int rval;
1097 uint16_t tgt_id;
1098 fc_port_t *fcport, *new_fcport;
1099 int found;
1100 struct qla_hw_data *ha = vha->hw;
1101
1102 rval = QLA_SUCCESS;
1103
1104 if (!test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags))
1105 return QLA_FUNCTION_FAILED;
1106
1107 if ((atomic_read(&vha->loop_down_timer) ||
1108 STATE_TRANSITION(vha))) {
1109 atomic_set(&vha->loop_down_timer, 0);
1110 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1111 return QLA_FUNCTION_FAILED;
1112 }
1113
1114 ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x2088,
1115 "Listing Target bit map...\n");
1116 ql_dump_buffer(ql_dbg_disc + ql_dbg_init, vha,
1117 0x2089, (uint8_t *)ha->gid_list, 32);
1118
1119 /* Allocate temporary rmtport for any new rmtports discovered. */
1120 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1121 if (new_fcport == NULL)
1122 return QLA_MEMORY_ALLOC_FAILED;
1123
1124 for_each_set_bit(tgt_id, (void *)ha->gid_list,
1125 QLAFX00_TGT_NODE_LIST_SIZE) {
1126
1127 /* Send get target node info */
1128 new_fcport->tgt_id = tgt_id;
1129 rval = qlafx00_fx_disc(vha, new_fcport,
1130 FXDISC_GET_TGT_NODE_INFO);
1131 if (rval != QLA_SUCCESS) {
1132 ql_log(ql_log_warn, vha, 0x208a,
1133 "Target info scan failed -- assuming zero-entry "
1134 "result...\n");
1135 continue;
1136 }
1137
1138 /* Locate matching device in database. */
1139 found = 0;
1140 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1141 if (memcmp(new_fcport->port_name,
1142 fcport->port_name, WWN_SIZE))
1143 continue;
1144
1145 found++;
1146
1147 /*
1148 * If tgt_id is same and state FCS_ONLINE, nothing
1149 * changed.
1150 */
1151 if (fcport->tgt_id == new_fcport->tgt_id &&
1152 atomic_read(&fcport->state) == FCS_ONLINE)
1153 break;
1154
1155 /*
1156 * Tgt ID changed or device was marked to be updated.
1157 */
1158 ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x208b,
1159 "TGT-ID Change(%s): Present tgt id: "
1160 "0x%x state: 0x%x "
1161 "wwnn = %llx wwpn = %llx.\n",
1162 __func__, fcport->tgt_id,
1163 atomic_read(&fcport->state),
1164 (unsigned long long)wwn_to_u64(fcport->node_name),
1165 (unsigned long long)wwn_to_u64(fcport->port_name));
1166
1167 ql_log(ql_log_info, vha, 0x208c,
1168 "TGT-ID Announce(%s): Discovered tgt "
1169 "id 0x%x wwnn = %llx "
1170 "wwpn = %llx.\n", __func__, new_fcport->tgt_id,
1171 (unsigned long long)
1172 wwn_to_u64(new_fcport->node_name),
1173 (unsigned long long)
1174 wwn_to_u64(new_fcport->port_name));
1175
1176 if (atomic_read(&fcport->state) != FCS_ONLINE) {
1177 fcport->old_tgt_id = fcport->tgt_id;
1178 fcport->tgt_id = new_fcport->tgt_id;
1179 ql_log(ql_log_info, vha, 0x208d,
1180 "TGT-ID: New fcport Added: %p\n", fcport);
1181 qla2x00_update_fcport(vha, fcport);
1182 } else {
1183 ql_log(ql_log_info, vha, 0x208e,
1184 " Existing TGT-ID %x did not get "
1185 " offline event from firmware.\n",
1186 fcport->old_tgt_id);
1187 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1188 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1189 kfree(new_fcport);
1190 return rval;
1191 }
1192 break;
1193 }
1194
1195 if (found)
1196 continue;
1197
1198 /* If device was not in our fcports list, then add it. */
1199 list_add_tail(&new_fcport->list, new_fcports);
1200
1201 /* Allocate a new replacement fcport. */
1202 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1203 if (new_fcport == NULL)
1204 return QLA_MEMORY_ALLOC_FAILED;
1205 }
1206
1207 kfree(new_fcport);
1208 return rval;
1209 }
1210
1211 /*
1212 * qlafx00_configure_all_targets
1213 * Setup target devices with node ID's.
1214 *
1215 * Input:
1216 * ha = adapter block pointer.
1217 *
1218 * Returns:
1219 * 0 = success.
1220 * BIT_0 = error
1221 */
1222 static int
qlafx00_configure_all_targets(scsi_qla_host_t * vha)1223 qlafx00_configure_all_targets(scsi_qla_host_t *vha)
1224 {
1225 int rval;
1226 fc_port_t *fcport, *rmptemp;
1227 LIST_HEAD(new_fcports);
1228
1229 rval = qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1230 FXDISC_GET_TGT_NODE_LIST);
1231 if (rval != QLA_SUCCESS) {
1232 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1233 return rval;
1234 }
1235
1236 rval = qlafx00_find_all_targets(vha, &new_fcports);
1237 if (rval != QLA_SUCCESS) {
1238 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1239 return rval;
1240 }
1241
1242 /*
1243 * Delete all previous devices marked lost.
1244 */
1245 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1246 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1247 break;
1248
1249 if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
1250 if (fcport->port_type != FCT_INITIATOR)
1251 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1252 }
1253 }
1254
1255 /*
1256 * Add the new devices to our devices list.
1257 */
1258 list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) {
1259 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
1260 break;
1261
1262 qla2x00_update_fcport(vha, fcport);
1263 list_move_tail(&fcport->list, &vha->vp_fcports);
1264 ql_log(ql_log_info, vha, 0x208f,
1265 "Attach new target id 0x%x wwnn = %llx "
1266 "wwpn = %llx.\n",
1267 fcport->tgt_id,
1268 (unsigned long long)wwn_to_u64(fcport->node_name),
1269 (unsigned long long)wwn_to_u64(fcport->port_name));
1270 }
1271
1272 /* Free all new device structures not processed. */
1273 list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) {
1274 list_del(&fcport->list);
1275 kfree(fcport);
1276 }
1277
1278 return rval;
1279 }
1280
1281 /*
1282 * qlafx00_configure_devices
1283 * Updates Fibre Channel Device Database with what is actually on loop.
1284 *
1285 * Input:
1286 * ha = adapter block pointer.
1287 *
1288 * Returns:
1289 * 0 = success.
1290 * 1 = error.
1291 * 2 = database was full and device was not configured.
1292 */
1293 int
qlafx00_configure_devices(scsi_qla_host_t * vha)1294 qlafx00_configure_devices(scsi_qla_host_t *vha)
1295 {
1296 int rval;
1297 unsigned long flags;
1298 rval = QLA_SUCCESS;
1299
1300 flags = vha->dpc_flags;
1301
1302 ql_dbg(ql_dbg_disc, vha, 0x2090,
1303 "Configure devices -- dpc flags =0x%lx\n", flags);
1304
1305 rval = qlafx00_configure_all_targets(vha);
1306
1307 if (rval == QLA_SUCCESS) {
1308 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1309 rval = QLA_FUNCTION_FAILED;
1310 } else {
1311 atomic_set(&vha->loop_state, LOOP_READY);
1312 ql_log(ql_log_info, vha, 0x2091,
1313 "Device Ready\n");
1314 }
1315 }
1316
1317 if (rval) {
1318 ql_dbg(ql_dbg_disc, vha, 0x2092,
1319 "%s *** FAILED ***.\n", __func__);
1320 } else {
1321 ql_dbg(ql_dbg_disc, vha, 0x2093,
1322 "%s: exiting normally.\n", __func__);
1323 }
1324 return rval;
1325 }
1326
1327 static void
qlafx00_abort_isp_cleanup(scsi_qla_host_t * vha,bool critemp)1328 qlafx00_abort_isp_cleanup(scsi_qla_host_t *vha, bool critemp)
1329 {
1330 struct qla_hw_data *ha = vha->hw;
1331 fc_port_t *fcport;
1332
1333 vha->flags.online = 0;
1334 ha->mr.fw_hbt_en = 0;
1335
1336 if (!critemp) {
1337 ha->flags.chip_reset_done = 0;
1338 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1339 vha->qla_stats.total_isp_aborts++;
1340 ql_log(ql_log_info, vha, 0x013f,
1341 "Performing ISP error recovery - ha = %p.\n", ha);
1342 ha->isp_ops->reset_chip(vha);
1343 }
1344
1345 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1346 atomic_set(&vha->loop_state, LOOP_DOWN);
1347 atomic_set(&vha->loop_down_timer,
1348 QLAFX00_LOOP_DOWN_TIME);
1349 } else {
1350 if (!atomic_read(&vha->loop_down_timer))
1351 atomic_set(&vha->loop_down_timer,
1352 QLAFX00_LOOP_DOWN_TIME);
1353 }
1354
1355 /* Clear all async request states across all VPs. */
1356 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1357 fcport->flags = 0;
1358 if (atomic_read(&fcport->state) == FCS_ONLINE)
1359 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
1360 }
1361
1362 if (!ha->flags.eeh_busy) {
1363 if (critemp) {
1364 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
1365 } else {
1366 /* Requeue all commands in outstanding command list. */
1367 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
1368 }
1369 }
1370
1371 qla2x00_free_irqs(vha);
1372 if (critemp)
1373 set_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags);
1374 else
1375 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1376
1377 /* Clear the Interrupts */
1378 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1379
1380 ql_log(ql_log_info, vha, 0x0140,
1381 "%s Done done - ha=%p.\n", __func__, ha);
1382 }
1383
1384 /**
1385 * qlafx00_init_response_q_entries() - Initializes response queue entries.
1386 * @ha: HA context
1387 *
1388 * Beginning of request ring has initialization control block already built
1389 * by nvram config routine.
1390 *
1391 * Returns 0 on success.
1392 */
1393 void
qlafx00_init_response_q_entries(struct rsp_que * rsp)1394 qlafx00_init_response_q_entries(struct rsp_que *rsp)
1395 {
1396 uint16_t cnt;
1397 response_t *pkt;
1398
1399 rsp->ring_ptr = rsp->ring;
1400 rsp->ring_index = 0;
1401 rsp->status_srb = NULL;
1402 pkt = rsp->ring_ptr;
1403 for (cnt = 0; cnt < rsp->length; cnt++) {
1404 pkt->signature = RESPONSE_PROCESSED;
1405 WRT_REG_DWORD((void __force __iomem *)&pkt->signature,
1406 RESPONSE_PROCESSED);
1407 pkt++;
1408 }
1409 }
1410
1411 int
qlafx00_rescan_isp(scsi_qla_host_t * vha)1412 qlafx00_rescan_isp(scsi_qla_host_t *vha)
1413 {
1414 uint32_t status = QLA_FUNCTION_FAILED;
1415 struct qla_hw_data *ha = vha->hw;
1416 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
1417 uint32_t aenmbx7;
1418
1419 qla2x00_request_irqs(ha, ha->rsp_q_map[0]);
1420
1421 aenmbx7 = RD_REG_DWORD(®->aenmailbox7);
1422 ha->mbx_intr_code = MSW(aenmbx7);
1423 ha->rqstq_intr_code = LSW(aenmbx7);
1424 ha->req_que_off = RD_REG_DWORD(®->aenmailbox1);
1425 ha->rsp_que_off = RD_REG_DWORD(®->aenmailbox3);
1426 ha->req_que_len = RD_REG_DWORD(®->aenmailbox5);
1427 ha->rsp_que_len = RD_REG_DWORD(®->aenmailbox6);
1428
1429 ql_dbg(ql_dbg_disc, vha, 0x2094,
1430 "fw returned mbx_intr_code: 0x%x, rqstq_intr_code: 0x%x "
1431 " Req que offset 0x%x Rsp que offset 0x%x\n",
1432 ha->mbx_intr_code, ha->rqstq_intr_code,
1433 ha->req_que_off, ha->rsp_que_len);
1434
1435 /* Clear the Interrupts */
1436 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1437
1438 status = qla2x00_init_rings(vha);
1439 if (!status) {
1440 vha->flags.online = 1;
1441
1442 /* if no cable then assume it's good */
1443 if ((vha->device_flags & DFLG_NO_CABLE))
1444 status = 0;
1445 /* Register system information */
1446 if (qlafx00_fx_disc(vha,
1447 &vha->hw->mr.fcport, FXDISC_REG_HOST_INFO))
1448 ql_dbg(ql_dbg_disc, vha, 0x2095,
1449 "failed to register host info\n");
1450 }
1451 scsi_unblock_requests(vha->host);
1452 return status;
1453 }
1454
1455 void
qlafx00_timer_routine(scsi_qla_host_t * vha)1456 qlafx00_timer_routine(scsi_qla_host_t *vha)
1457 {
1458 struct qla_hw_data *ha = vha->hw;
1459 uint32_t fw_heart_beat;
1460 uint32_t aenmbx0;
1461 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
1462 uint32_t tempc;
1463
1464 /* Check firmware health */
1465 if (ha->mr.fw_hbt_cnt)
1466 ha->mr.fw_hbt_cnt--;
1467 else {
1468 if ((!ha->flags.mr_reset_hdlr_active) &&
1469 (!test_bit(UNLOADING, &vha->dpc_flags)) &&
1470 (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
1471 (ha->mr.fw_hbt_en)) {
1472 fw_heart_beat = RD_REG_DWORD(®->fwheartbeat);
1473 if (fw_heart_beat != ha->mr.old_fw_hbt_cnt) {
1474 ha->mr.old_fw_hbt_cnt = fw_heart_beat;
1475 ha->mr.fw_hbt_miss_cnt = 0;
1476 } else {
1477 ha->mr.fw_hbt_miss_cnt++;
1478 if (ha->mr.fw_hbt_miss_cnt ==
1479 QLAFX00_HEARTBEAT_MISS_CNT) {
1480 set_bit(ISP_ABORT_NEEDED,
1481 &vha->dpc_flags);
1482 qla2xxx_wake_dpc(vha);
1483 ha->mr.fw_hbt_miss_cnt = 0;
1484 }
1485 }
1486 }
1487 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
1488 }
1489
1490 if (test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags)) {
1491 /* Reset recovery to be performed in timer routine */
1492 aenmbx0 = RD_REG_DWORD(®->aenmailbox0);
1493 if (ha->mr.fw_reset_timer_exp) {
1494 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1495 qla2xxx_wake_dpc(vha);
1496 ha->mr.fw_reset_timer_exp = 0;
1497 } else if (aenmbx0 == MBA_FW_RESTART_CMPLT) {
1498 /* Wake up DPC to rescan the targets */
1499 set_bit(FX00_TARGET_SCAN, &vha->dpc_flags);
1500 clear_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1501 qla2xxx_wake_dpc(vha);
1502 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1503 } else if ((aenmbx0 == MBA_FW_STARTING) &&
1504 (!ha->mr.fw_hbt_en)) {
1505 ha->mr.fw_hbt_en = 1;
1506 } else if (!ha->mr.fw_reset_timer_tick) {
1507 if (aenmbx0 == ha->mr.old_aenmbx0_state)
1508 ha->mr.fw_reset_timer_exp = 1;
1509 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1510 } else if (aenmbx0 == 0xFFFFFFFF) {
1511 uint32_t data0, data1;
1512
1513 data0 = QLAFX00_RD_REG(ha,
1514 QLAFX00_BAR1_BASE_ADDR_REG);
1515 data1 = QLAFX00_RD_REG(ha,
1516 QLAFX00_PEX0_WIN0_BASE_ADDR_REG);
1517
1518 data0 &= 0xffff0000;
1519 data1 &= 0x0000ffff;
1520
1521 QLAFX00_WR_REG(ha,
1522 QLAFX00_PEX0_WIN0_BASE_ADDR_REG,
1523 (data0 | data1));
1524 } else if ((aenmbx0 & 0xFF00) == MBA_FW_POLL_STATE) {
1525 ha->mr.fw_reset_timer_tick =
1526 QLAFX00_MAX_RESET_INTERVAL;
1527 } else if (aenmbx0 == MBA_FW_RESET_FCT) {
1528 ha->mr.fw_reset_timer_tick =
1529 QLAFX00_MAX_RESET_INTERVAL;
1530 }
1531 if (ha->mr.old_aenmbx0_state != aenmbx0) {
1532 ha->mr.old_aenmbx0_state = aenmbx0;
1533 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
1534 }
1535 ha->mr.fw_reset_timer_tick--;
1536 }
1537 if (test_bit(FX00_CRITEMP_RECOVERY, &vha->dpc_flags)) {
1538 /*
1539 * Critical temperature recovery to be
1540 * performed in timer routine
1541 */
1542 if (ha->mr.fw_critemp_timer_tick == 0) {
1543 tempc = QLAFX00_GET_TEMPERATURE(ha);
1544 ql_dbg(ql_dbg_timer, vha, 0x6012,
1545 "ISPFx00(%s): Critical temp timer, "
1546 "current SOC temperature: %d\n",
1547 __func__, tempc);
1548 if (tempc < ha->mr.critical_temperature) {
1549 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1550 clear_bit(FX00_CRITEMP_RECOVERY,
1551 &vha->dpc_flags);
1552 qla2xxx_wake_dpc(vha);
1553 }
1554 ha->mr.fw_critemp_timer_tick =
1555 QLAFX00_CRITEMP_INTERVAL;
1556 } else {
1557 ha->mr.fw_critemp_timer_tick--;
1558 }
1559 }
1560 if (ha->mr.host_info_resend) {
1561 /*
1562 * Incomplete host info might be sent to firmware
1563 * durinng system boot - info should be resend
1564 */
1565 if (ha->mr.hinfo_resend_timer_tick == 0) {
1566 ha->mr.host_info_resend = false;
1567 set_bit(FX00_HOST_INFO_RESEND, &vha->dpc_flags);
1568 ha->mr.hinfo_resend_timer_tick =
1569 QLAFX00_HINFO_RESEND_INTERVAL;
1570 qla2xxx_wake_dpc(vha);
1571 } else {
1572 ha->mr.hinfo_resend_timer_tick--;
1573 }
1574 }
1575
1576 }
1577
1578 /*
1579 * qlfx00a_reset_initialize
1580 * Re-initialize after a iSA device reset.
1581 *
1582 * Input:
1583 * ha = adapter block pointer.
1584 *
1585 * Returns:
1586 * 0 = success
1587 */
1588 int
qlafx00_reset_initialize(scsi_qla_host_t * vha)1589 qlafx00_reset_initialize(scsi_qla_host_t *vha)
1590 {
1591 struct qla_hw_data *ha = vha->hw;
1592
1593 if (vha->device_flags & DFLG_DEV_FAILED) {
1594 ql_dbg(ql_dbg_init, vha, 0x0142,
1595 "Device in failed state\n");
1596 return QLA_SUCCESS;
1597 }
1598
1599 ha->flags.mr_reset_hdlr_active = 1;
1600
1601 if (vha->flags.online) {
1602 scsi_block_requests(vha->host);
1603 qlafx00_abort_isp_cleanup(vha, false);
1604 }
1605
1606 ql_log(ql_log_info, vha, 0x0143,
1607 "(%s): succeeded.\n", __func__);
1608 ha->flags.mr_reset_hdlr_active = 0;
1609 return QLA_SUCCESS;
1610 }
1611
1612 /*
1613 * qlafx00_abort_isp
1614 * Resets ISP and aborts all outstanding commands.
1615 *
1616 * Input:
1617 * ha = adapter block pointer.
1618 *
1619 * Returns:
1620 * 0 = success
1621 */
1622 int
qlafx00_abort_isp(scsi_qla_host_t * vha)1623 qlafx00_abort_isp(scsi_qla_host_t *vha)
1624 {
1625 struct qla_hw_data *ha = vha->hw;
1626
1627 if (vha->flags.online) {
1628 if (unlikely(pci_channel_offline(ha->pdev) &&
1629 ha->flags.pci_channel_io_perm_failure)) {
1630 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
1631 return QLA_SUCCESS;
1632 }
1633
1634 scsi_block_requests(vha->host);
1635 qlafx00_abort_isp_cleanup(vha, false);
1636 } else {
1637 scsi_block_requests(vha->host);
1638 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1639 vha->qla_stats.total_isp_aborts++;
1640 ha->isp_ops->reset_chip(vha);
1641 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags);
1642 /* Clear the Interrupts */
1643 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS);
1644 }
1645
1646 ql_log(ql_log_info, vha, 0x0145,
1647 "(%s): succeeded.\n", __func__);
1648
1649 return QLA_SUCCESS;
1650 }
1651
1652 static inline fc_port_t*
qlafx00_get_fcport(struct scsi_qla_host * vha,int tgt_id)1653 qlafx00_get_fcport(struct scsi_qla_host *vha, int tgt_id)
1654 {
1655 fc_port_t *fcport;
1656
1657 /* Check for matching device in remote port list. */
1658 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1659 if (fcport->tgt_id == tgt_id) {
1660 ql_dbg(ql_dbg_async, vha, 0x5072,
1661 "Matching fcport(%p) found with TGT-ID: 0x%x "
1662 "and Remote TGT_ID: 0x%x\n",
1663 fcport, fcport->tgt_id, tgt_id);
1664 return fcport;
1665 }
1666 }
1667 return NULL;
1668 }
1669
1670 static void
qlafx00_tgt_detach(struct scsi_qla_host * vha,int tgt_id)1671 qlafx00_tgt_detach(struct scsi_qla_host *vha, int tgt_id)
1672 {
1673 fc_port_t *fcport;
1674
1675 ql_log(ql_log_info, vha, 0x5073,
1676 "Detach TGT-ID: 0x%x\n", tgt_id);
1677
1678 fcport = qlafx00_get_fcport(vha, tgt_id);
1679 if (!fcport)
1680 return;
1681
1682 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1683
1684 return;
1685 }
1686
1687 int
qlafx00_process_aen(struct scsi_qla_host * vha,struct qla_work_evt * evt)1688 qlafx00_process_aen(struct scsi_qla_host *vha, struct qla_work_evt *evt)
1689 {
1690 int rval = 0;
1691 uint32_t aen_code, aen_data;
1692
1693 aen_code = FCH_EVT_VENDOR_UNIQUE;
1694 aen_data = evt->u.aenfx.evtcode;
1695
1696 switch (evt->u.aenfx.evtcode) {
1697 case QLAFX00_MBA_PORT_UPDATE: /* Port database update */
1698 if (evt->u.aenfx.mbx[1] == 0) {
1699 if (evt->u.aenfx.mbx[2] == 1) {
1700 if (!vha->flags.fw_tgt_reported)
1701 vha->flags.fw_tgt_reported = 1;
1702 atomic_set(&vha->loop_down_timer, 0);
1703 atomic_set(&vha->loop_state, LOOP_UP);
1704 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1705 qla2xxx_wake_dpc(vha);
1706 } else if (evt->u.aenfx.mbx[2] == 2) {
1707 qlafx00_tgt_detach(vha, evt->u.aenfx.mbx[3]);
1708 }
1709 } else if (evt->u.aenfx.mbx[1] == 0xffff) {
1710 if (evt->u.aenfx.mbx[2] == 1) {
1711 if (!vha->flags.fw_tgt_reported)
1712 vha->flags.fw_tgt_reported = 1;
1713 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1714 } else if (evt->u.aenfx.mbx[2] == 2) {
1715 vha->device_flags |= DFLG_NO_CABLE;
1716 qla2x00_mark_all_devices_lost(vha, 1);
1717 }
1718 }
1719 break;
1720 case QLAFX00_MBA_LINK_UP:
1721 aen_code = FCH_EVT_LINKUP;
1722 aen_data = 0;
1723 break;
1724 case QLAFX00_MBA_LINK_DOWN:
1725 aen_code = FCH_EVT_LINKDOWN;
1726 aen_data = 0;
1727 break;
1728 case QLAFX00_MBA_TEMP_CRIT: /* Critical temperature event */
1729 ql_log(ql_log_info, vha, 0x5082,
1730 "Process critical temperature event "
1731 "aenmb[0]: %x\n",
1732 evt->u.aenfx.evtcode);
1733 scsi_block_requests(vha->host);
1734 qlafx00_abort_isp_cleanup(vha, true);
1735 scsi_unblock_requests(vha->host);
1736 break;
1737 }
1738
1739 fc_host_post_event(vha->host, fc_get_event_number(),
1740 aen_code, aen_data);
1741
1742 return rval;
1743 }
1744
1745 static void
qlafx00_update_host_attr(scsi_qla_host_t * vha,struct port_info_data * pinfo)1746 qlafx00_update_host_attr(scsi_qla_host_t *vha, struct port_info_data *pinfo)
1747 {
1748 u64 port_name = 0, node_name = 0;
1749
1750 port_name = (unsigned long long)wwn_to_u64(pinfo->port_name);
1751 node_name = (unsigned long long)wwn_to_u64(pinfo->node_name);
1752
1753 fc_host_node_name(vha->host) = node_name;
1754 fc_host_port_name(vha->host) = port_name;
1755 if (!pinfo->port_type)
1756 vha->hw->current_topology = ISP_CFG_F;
1757 if (pinfo->link_status == QLAFX00_LINK_STATUS_UP)
1758 atomic_set(&vha->loop_state, LOOP_READY);
1759 else if (pinfo->link_status == QLAFX00_LINK_STATUS_DOWN)
1760 atomic_set(&vha->loop_state, LOOP_DOWN);
1761 vha->hw->link_data_rate = (uint16_t)pinfo->link_config;
1762 }
1763
1764 static void
qla2x00_fxdisc_iocb_timeout(void * data)1765 qla2x00_fxdisc_iocb_timeout(void *data)
1766 {
1767 srb_t *sp = (srb_t *)data;
1768 struct srb_iocb *lio = &sp->u.iocb_cmd;
1769
1770 complete(&lio->u.fxiocb.fxiocb_comp);
1771 }
1772
1773 static void
qla2x00_fxdisc_sp_done(void * data,void * ptr,int res)1774 qla2x00_fxdisc_sp_done(void *data, void *ptr, int res)
1775 {
1776 srb_t *sp = (srb_t *)ptr;
1777 struct srb_iocb *lio = &sp->u.iocb_cmd;
1778
1779 complete(&lio->u.fxiocb.fxiocb_comp);
1780 }
1781
1782 int
qlafx00_fx_disc(scsi_qla_host_t * vha,fc_port_t * fcport,uint16_t fx_type)1783 qlafx00_fx_disc(scsi_qla_host_t *vha, fc_port_t *fcport, uint16_t fx_type)
1784 {
1785 srb_t *sp;
1786 struct srb_iocb *fdisc;
1787 int rval = QLA_FUNCTION_FAILED;
1788 struct qla_hw_data *ha = vha->hw;
1789 struct host_system_info *phost_info;
1790 struct register_host_info *preg_hsi;
1791 struct new_utsname *p_sysid = NULL;
1792 struct timeval tv;
1793
1794 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1795 if (!sp)
1796 goto done;
1797
1798 fdisc = &sp->u.iocb_cmd;
1799 switch (fx_type) {
1800 case FXDISC_GET_CONFIG_INFO:
1801 fdisc->u.fxiocb.flags =
1802 SRB_FXDISC_RESP_DMA_VALID;
1803 fdisc->u.fxiocb.rsp_len = sizeof(struct config_info_data);
1804 break;
1805 case FXDISC_GET_PORT_INFO:
1806 fdisc->u.fxiocb.flags =
1807 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1808 fdisc->u.fxiocb.rsp_len = QLAFX00_PORT_DATA_INFO;
1809 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->port_id);
1810 break;
1811 case FXDISC_GET_TGT_NODE_INFO:
1812 fdisc->u.fxiocb.flags =
1813 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1814 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_INFO;
1815 fdisc->u.fxiocb.req_data = cpu_to_le32(fcport->tgt_id);
1816 break;
1817 case FXDISC_GET_TGT_NODE_LIST:
1818 fdisc->u.fxiocb.flags =
1819 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID;
1820 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_LIST_SIZE;
1821 break;
1822 case FXDISC_REG_HOST_INFO:
1823 fdisc->u.fxiocb.flags = SRB_FXDISC_REQ_DMA_VALID;
1824 fdisc->u.fxiocb.req_len = sizeof(struct register_host_info);
1825 p_sysid = utsname();
1826 if (!p_sysid) {
1827 ql_log(ql_log_warn, vha, 0x303c,
1828 "Not able to get the system information\n");
1829 goto done_free_sp;
1830 }
1831 break;
1832 case FXDISC_ABORT_IOCTL:
1833 default:
1834 break;
1835 }
1836
1837 if (fdisc->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) {
1838 fdisc->u.fxiocb.req_addr = dma_alloc_coherent(&ha->pdev->dev,
1839 fdisc->u.fxiocb.req_len,
1840 &fdisc->u.fxiocb.req_dma_handle, GFP_KERNEL);
1841 if (!fdisc->u.fxiocb.req_addr)
1842 goto done_free_sp;
1843
1844 if (fx_type == FXDISC_REG_HOST_INFO) {
1845 preg_hsi = (struct register_host_info *)
1846 fdisc->u.fxiocb.req_addr;
1847 phost_info = &preg_hsi->hsi;
1848 memset(preg_hsi, 0, sizeof(struct register_host_info));
1849 phost_info->os_type = OS_TYPE_LINUX;
1850 strncpy(phost_info->sysname,
1851 p_sysid->sysname, SYSNAME_LENGTH);
1852 strncpy(phost_info->nodename,
1853 p_sysid->nodename, NODENAME_LENGTH);
1854 if (!strcmp(phost_info->nodename, "(none)"))
1855 ha->mr.host_info_resend = true;
1856 strncpy(phost_info->release,
1857 p_sysid->release, RELEASE_LENGTH);
1858 strncpy(phost_info->version,
1859 p_sysid->version, VERSION_LENGTH);
1860 strncpy(phost_info->machine,
1861 p_sysid->machine, MACHINE_LENGTH);
1862 strncpy(phost_info->domainname,
1863 p_sysid->domainname, DOMNAME_LENGTH);
1864 strncpy(phost_info->hostdriver,
1865 QLA2XXX_VERSION, VERSION_LENGTH);
1866 do_gettimeofday(&tv);
1867 preg_hsi->utc = (uint64_t)tv.tv_sec;
1868 ql_dbg(ql_dbg_init, vha, 0x0149,
1869 "ISP%04X: Host registration with firmware\n",
1870 ha->pdev->device);
1871 ql_dbg(ql_dbg_init, vha, 0x014a,
1872 "os_type = '%d', sysname = '%s', nodname = '%s'\n",
1873 phost_info->os_type,
1874 phost_info->sysname,
1875 phost_info->nodename);
1876 ql_dbg(ql_dbg_init, vha, 0x014b,
1877 "release = '%s', version = '%s'\n",
1878 phost_info->release,
1879 phost_info->version);
1880 ql_dbg(ql_dbg_init, vha, 0x014c,
1881 "machine = '%s' "
1882 "domainname = '%s', hostdriver = '%s'\n",
1883 phost_info->machine,
1884 phost_info->domainname,
1885 phost_info->hostdriver);
1886 ql_dump_buffer(ql_dbg_init + ql_dbg_disc, vha, 0x014d,
1887 (uint8_t *)phost_info,
1888 sizeof(struct host_system_info));
1889 }
1890 }
1891
1892 if (fdisc->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) {
1893 fdisc->u.fxiocb.rsp_addr = dma_alloc_coherent(&ha->pdev->dev,
1894 fdisc->u.fxiocb.rsp_len,
1895 &fdisc->u.fxiocb.rsp_dma_handle, GFP_KERNEL);
1896 if (!fdisc->u.fxiocb.rsp_addr)
1897 goto done_unmap_req;
1898 }
1899
1900 sp->type = SRB_FXIOCB_DCMD;
1901 sp->name = "fxdisc";
1902 qla2x00_init_timer(sp, FXDISC_TIMEOUT);
1903 fdisc->timeout = qla2x00_fxdisc_iocb_timeout;
1904 fdisc->u.fxiocb.req_func_type = cpu_to_le16(fx_type);
1905 sp->done = qla2x00_fxdisc_sp_done;
1906
1907 rval = qla2x00_start_sp(sp);
1908 if (rval != QLA_SUCCESS)
1909 goto done_unmap_dma;
1910
1911 wait_for_completion(&fdisc->u.fxiocb.fxiocb_comp);
1912
1913 if (fx_type == FXDISC_GET_CONFIG_INFO) {
1914 struct config_info_data *pinfo =
1915 (struct config_info_data *) fdisc->u.fxiocb.rsp_addr;
1916 strcpy(vha->hw->model_number, pinfo->model_num);
1917 strcpy(vha->hw->model_desc, pinfo->model_description);
1918 memcpy(&vha->hw->mr.symbolic_name, pinfo->symbolic_name,
1919 sizeof(vha->hw->mr.symbolic_name));
1920 memcpy(&vha->hw->mr.serial_num, pinfo->serial_num,
1921 sizeof(vha->hw->mr.serial_num));
1922 memcpy(&vha->hw->mr.hw_version, pinfo->hw_version,
1923 sizeof(vha->hw->mr.hw_version));
1924 memcpy(&vha->hw->mr.fw_version, pinfo->fw_version,
1925 sizeof(vha->hw->mr.fw_version));
1926 strim(vha->hw->mr.fw_version);
1927 memcpy(&vha->hw->mr.uboot_version, pinfo->uboot_version,
1928 sizeof(vha->hw->mr.uboot_version));
1929 memcpy(&vha->hw->mr.fru_serial_num, pinfo->fru_serial_num,
1930 sizeof(vha->hw->mr.fru_serial_num));
1931 vha->hw->mr.critical_temperature =
1932 (pinfo->nominal_temp_value) ?
1933 pinfo->nominal_temp_value : QLAFX00_CRITEMP_THRSHLD;
1934 ha->mr.extended_io_enabled = (pinfo->enabled_capabilities &
1935 QLAFX00_EXTENDED_IO_EN_MASK) != 0;
1936 } else if (fx_type == FXDISC_GET_PORT_INFO) {
1937 struct port_info_data *pinfo =
1938 (struct port_info_data *) fdisc->u.fxiocb.rsp_addr;
1939 memcpy(vha->node_name, pinfo->node_name, WWN_SIZE);
1940 memcpy(vha->port_name, pinfo->port_name, WWN_SIZE);
1941 vha->d_id.b.domain = pinfo->port_id[0];
1942 vha->d_id.b.area = pinfo->port_id[1];
1943 vha->d_id.b.al_pa = pinfo->port_id[2];
1944 qlafx00_update_host_attr(vha, pinfo);
1945 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0141,
1946 (uint8_t *)pinfo, 16);
1947 } else if (fx_type == FXDISC_GET_TGT_NODE_INFO) {
1948 struct qlafx00_tgt_node_info *pinfo =
1949 (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr;
1950 memcpy(fcport->node_name, pinfo->tgt_node_wwnn, WWN_SIZE);
1951 memcpy(fcport->port_name, pinfo->tgt_node_wwpn, WWN_SIZE);
1952 fcport->port_type = FCT_TARGET;
1953 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0144,
1954 (uint8_t *)pinfo, 16);
1955 } else if (fx_type == FXDISC_GET_TGT_NODE_LIST) {
1956 struct qlafx00_tgt_node_info *pinfo =
1957 (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr;
1958 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0146,
1959 (uint8_t *)pinfo, 16);
1960 memcpy(vha->hw->gid_list, pinfo, QLAFX00_TGT_NODE_LIST_SIZE);
1961 } else if (fx_type == FXDISC_ABORT_IOCTL)
1962 fdisc->u.fxiocb.result =
1963 (fdisc->u.fxiocb.result ==
1964 cpu_to_le32(QLAFX00_IOCTL_ICOB_ABORT_SUCCESS)) ?
1965 cpu_to_le32(QLA_SUCCESS) : cpu_to_le32(QLA_FUNCTION_FAILED);
1966
1967 rval = le32_to_cpu(fdisc->u.fxiocb.result);
1968
1969 done_unmap_dma:
1970 if (fdisc->u.fxiocb.rsp_addr)
1971 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.rsp_len,
1972 fdisc->u.fxiocb.rsp_addr, fdisc->u.fxiocb.rsp_dma_handle);
1973
1974 done_unmap_req:
1975 if (fdisc->u.fxiocb.req_addr)
1976 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.req_len,
1977 fdisc->u.fxiocb.req_addr, fdisc->u.fxiocb.req_dma_handle);
1978 done_free_sp:
1979 sp->free(vha, sp);
1980 done:
1981 return rval;
1982 }
1983
1984 /*
1985 * qlafx00_initialize_adapter
1986 * Initialize board.
1987 *
1988 * Input:
1989 * ha = adapter block pointer.
1990 *
1991 * Returns:
1992 * 0 = success
1993 */
1994 int
qlafx00_initialize_adapter(scsi_qla_host_t * vha)1995 qlafx00_initialize_adapter(scsi_qla_host_t *vha)
1996 {
1997 int rval;
1998 struct qla_hw_data *ha = vha->hw;
1999 uint32_t tempc;
2000
2001 /* Clear adapter flags. */
2002 vha->flags.online = 0;
2003 ha->flags.chip_reset_done = 0;
2004 vha->flags.reset_active = 0;
2005 ha->flags.pci_channel_io_perm_failure = 0;
2006 ha->flags.eeh_busy = 0;
2007 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2008 atomic_set(&vha->loop_state, LOOP_DOWN);
2009 vha->device_flags = DFLG_NO_CABLE;
2010 vha->dpc_flags = 0;
2011 vha->flags.management_server_logged_in = 0;
2012 ha->isp_abort_cnt = 0;
2013 ha->beacon_blink_led = 0;
2014
2015 set_bit(0, ha->req_qid_map);
2016 set_bit(0, ha->rsp_qid_map);
2017
2018 ql_dbg(ql_dbg_init, vha, 0x0147,
2019 "Configuring PCI space...\n");
2020
2021 rval = ha->isp_ops->pci_config(vha);
2022 if (rval) {
2023 ql_log(ql_log_warn, vha, 0x0148,
2024 "Unable to configure PCI space.\n");
2025 return rval;
2026 }
2027
2028 rval = qlafx00_init_fw_ready(vha);
2029 if (rval != QLA_SUCCESS)
2030 return rval;
2031
2032 qlafx00_save_queue_ptrs(vha);
2033
2034 rval = qlafx00_config_queues(vha);
2035 if (rval != QLA_SUCCESS)
2036 return rval;
2037
2038 /*
2039 * Allocate the array of outstanding commands
2040 * now that we know the firmware resources.
2041 */
2042 rval = qla2x00_alloc_outstanding_cmds(ha, vha->req);
2043 if (rval != QLA_SUCCESS)
2044 return rval;
2045
2046 rval = qla2x00_init_rings(vha);
2047 ha->flags.chip_reset_done = 1;
2048
2049 tempc = QLAFX00_GET_TEMPERATURE(ha);
2050 ql_dbg(ql_dbg_init, vha, 0x0152,
2051 "ISPFx00(%s): Critical temp timer, current SOC temperature: 0x%x\n",
2052 __func__, tempc);
2053
2054 return rval;
2055 }
2056
2057 uint32_t
qlafx00_fw_state_show(struct device * dev,struct device_attribute * attr,char * buf)2058 qlafx00_fw_state_show(struct device *dev, struct device_attribute *attr,
2059 char *buf)
2060 {
2061 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
2062 int rval = QLA_FUNCTION_FAILED;
2063 uint32_t state[1];
2064
2065 if (qla2x00_reset_active(vha))
2066 ql_log(ql_log_warn, vha, 0x70ce,
2067 "ISP reset active.\n");
2068 else if (!vha->hw->flags.eeh_busy) {
2069 rval = qlafx00_get_firmware_state(vha, state);
2070 }
2071 if (rval != QLA_SUCCESS)
2072 memset(state, -1, sizeof(state));
2073
2074 return state[0];
2075 }
2076
2077 void
qlafx00_get_host_speed(struct Scsi_Host * shost)2078 qlafx00_get_host_speed(struct Scsi_Host *shost)
2079 {
2080 struct qla_hw_data *ha = ((struct scsi_qla_host *)
2081 (shost_priv(shost)))->hw;
2082 u32 speed = FC_PORTSPEED_UNKNOWN;
2083
2084 switch (ha->link_data_rate) {
2085 case QLAFX00_PORT_SPEED_2G:
2086 speed = FC_PORTSPEED_2GBIT;
2087 break;
2088 case QLAFX00_PORT_SPEED_4G:
2089 speed = FC_PORTSPEED_4GBIT;
2090 break;
2091 case QLAFX00_PORT_SPEED_8G:
2092 speed = FC_PORTSPEED_8GBIT;
2093 break;
2094 case QLAFX00_PORT_SPEED_10G:
2095 speed = FC_PORTSPEED_10GBIT;
2096 break;
2097 }
2098 fc_host_speed(shost) = speed;
2099 }
2100
2101 /** QLAFX00 specific ISR implementation functions */
2102
2103 static inline void
qlafx00_handle_sense(srb_t * sp,uint8_t * sense_data,uint32_t par_sense_len,uint32_t sense_len,struct rsp_que * rsp,int res)2104 qlafx00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
2105 uint32_t sense_len, struct rsp_que *rsp, int res)
2106 {
2107 struct scsi_qla_host *vha = sp->fcport->vha;
2108 struct scsi_cmnd *cp = GET_CMD_SP(sp);
2109 uint32_t track_sense_len;
2110
2111 SET_FW_SENSE_LEN(sp, sense_len);
2112
2113 if (sense_len >= SCSI_SENSE_BUFFERSIZE)
2114 sense_len = SCSI_SENSE_BUFFERSIZE;
2115
2116 SET_CMD_SENSE_LEN(sp, sense_len);
2117 SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
2118 track_sense_len = sense_len;
2119
2120 if (sense_len > par_sense_len)
2121 sense_len = par_sense_len;
2122
2123 memcpy(cp->sense_buffer, sense_data, sense_len);
2124
2125 SET_FW_SENSE_LEN(sp, GET_FW_SENSE_LEN(sp) - sense_len);
2126
2127 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
2128 track_sense_len -= sense_len;
2129 SET_CMD_SENSE_LEN(sp, track_sense_len);
2130
2131 ql_dbg(ql_dbg_io, vha, 0x304d,
2132 "sense_len=0x%x par_sense_len=0x%x track_sense_len=0x%x.\n",
2133 sense_len, par_sense_len, track_sense_len);
2134 if (GET_FW_SENSE_LEN(sp) > 0) {
2135 rsp->status_srb = sp;
2136 cp->result = res;
2137 }
2138
2139 if (sense_len) {
2140 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x3039,
2141 "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n",
2142 sp->fcport->vha->host_no, cp->device->id, cp->device->lun,
2143 cp);
2144 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3049,
2145 cp->sense_buffer, sense_len);
2146 }
2147 }
2148
2149 static void
qlafx00_tm_iocb_entry(scsi_qla_host_t * vha,struct req_que * req,struct tsk_mgmt_entry_fx00 * pkt,srb_t * sp,__le16 sstatus,__le16 cpstatus)2150 qlafx00_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2151 struct tsk_mgmt_entry_fx00 *pkt, srb_t *sp,
2152 __le16 sstatus, __le16 cpstatus)
2153 {
2154 struct srb_iocb *tmf;
2155
2156 tmf = &sp->u.iocb_cmd;
2157 if (cpstatus != cpu_to_le16((uint16_t)CS_COMPLETE) ||
2158 (sstatus & cpu_to_le16((uint16_t)SS_RESPONSE_INFO_LEN_VALID)))
2159 cpstatus = cpu_to_le16((uint16_t)CS_INCOMPLETE);
2160 tmf->u.tmf.comp_status = cpstatus;
2161 sp->done(vha, sp, 0);
2162 }
2163
2164 static void
qlafx00_abort_iocb_entry(scsi_qla_host_t * vha,struct req_que * req,struct abort_iocb_entry_fx00 * pkt)2165 qlafx00_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2166 struct abort_iocb_entry_fx00 *pkt)
2167 {
2168 const char func[] = "ABT_IOCB";
2169 srb_t *sp;
2170 struct srb_iocb *abt;
2171
2172 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2173 if (!sp)
2174 return;
2175
2176 abt = &sp->u.iocb_cmd;
2177 abt->u.abt.comp_status = pkt->tgt_id_sts;
2178 sp->done(vha, sp, 0);
2179 }
2180
2181 static void
qlafx00_ioctl_iosb_entry(scsi_qla_host_t * vha,struct req_que * req,struct ioctl_iocb_entry_fx00 * pkt)2182 qlafx00_ioctl_iosb_entry(scsi_qla_host_t *vha, struct req_que *req,
2183 struct ioctl_iocb_entry_fx00 *pkt)
2184 {
2185 const char func[] = "IOSB_IOCB";
2186 srb_t *sp;
2187 struct fc_bsg_job *bsg_job;
2188 struct srb_iocb *iocb_job;
2189 int res;
2190 struct qla_mt_iocb_rsp_fx00 fstatus;
2191 uint8_t *fw_sts_ptr;
2192
2193 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2194 if (!sp)
2195 return;
2196
2197 if (sp->type == SRB_FXIOCB_DCMD) {
2198 iocb_job = &sp->u.iocb_cmd;
2199 iocb_job->u.fxiocb.seq_number = pkt->seq_no;
2200 iocb_job->u.fxiocb.fw_flags = pkt->fw_iotcl_flags;
2201 iocb_job->u.fxiocb.result = pkt->status;
2202 if (iocb_job->u.fxiocb.flags & SRB_FXDISC_RSP_DWRD_VALID)
2203 iocb_job->u.fxiocb.req_data =
2204 pkt->dataword_r;
2205 } else {
2206 bsg_job = sp->u.bsg_job;
2207
2208 memset(&fstatus, 0, sizeof(struct qla_mt_iocb_rsp_fx00));
2209
2210 fstatus.reserved_1 = pkt->reserved_0;
2211 fstatus.func_type = pkt->comp_func_num;
2212 fstatus.ioctl_flags = pkt->fw_iotcl_flags;
2213 fstatus.ioctl_data = pkt->dataword_r;
2214 fstatus.adapid = pkt->adapid;
2215 fstatus.reserved_2 = pkt->dataword_r_extra;
2216 fstatus.res_count = pkt->residuallen;
2217 fstatus.status = pkt->status;
2218 fstatus.seq_number = pkt->seq_no;
2219 memcpy(fstatus.reserved_3,
2220 pkt->reserved_2, 20 * sizeof(uint8_t));
2221
2222 fw_sts_ptr = ((uint8_t *)bsg_job->req->sense) +
2223 sizeof(struct fc_bsg_reply);
2224
2225 memcpy(fw_sts_ptr, (uint8_t *)&fstatus,
2226 sizeof(struct qla_mt_iocb_rsp_fx00));
2227 bsg_job->reply_len = sizeof(struct fc_bsg_reply) +
2228 sizeof(struct qla_mt_iocb_rsp_fx00) + sizeof(uint8_t);
2229
2230 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
2231 sp->fcport->vha, 0x5080,
2232 (uint8_t *)pkt, sizeof(struct ioctl_iocb_entry_fx00));
2233
2234 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
2235 sp->fcport->vha, 0x5074,
2236 (uint8_t *)fw_sts_ptr, sizeof(struct qla_mt_iocb_rsp_fx00));
2237
2238 res = bsg_job->reply->result = DID_OK << 16;
2239 bsg_job->reply->reply_payload_rcv_len =
2240 bsg_job->reply_payload.payload_len;
2241 }
2242 sp->done(vha, sp, res);
2243 }
2244
2245 /**
2246 * qlafx00_status_entry() - Process a Status IOCB entry.
2247 * @ha: SCSI driver HA context
2248 * @pkt: Entry pointer
2249 */
2250 static void
qlafx00_status_entry(scsi_qla_host_t * vha,struct rsp_que * rsp,void * pkt)2251 qlafx00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
2252 {
2253 srb_t *sp;
2254 fc_port_t *fcport;
2255 struct scsi_cmnd *cp;
2256 struct sts_entry_fx00 *sts;
2257 __le16 comp_status;
2258 __le16 scsi_status;
2259 __le16 lscsi_status;
2260 int32_t resid;
2261 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
2262 fw_resid_len;
2263 uint8_t *rsp_info = NULL, *sense_data = NULL;
2264 struct qla_hw_data *ha = vha->hw;
2265 uint32_t hindex, handle;
2266 uint16_t que;
2267 struct req_que *req;
2268 int logit = 1;
2269 int res = 0;
2270
2271 sts = (struct sts_entry_fx00 *) pkt;
2272
2273 comp_status = sts->comp_status;
2274 scsi_status = sts->scsi_status & cpu_to_le16((uint16_t)SS_MASK);
2275 hindex = sts->handle;
2276 handle = LSW(hindex);
2277
2278 que = MSW(hindex);
2279 req = ha->req_q_map[que];
2280
2281 /* Validate handle. */
2282 if (handle < req->num_outstanding_cmds)
2283 sp = req->outstanding_cmds[handle];
2284 else
2285 sp = NULL;
2286
2287 if (sp == NULL) {
2288 ql_dbg(ql_dbg_io, vha, 0x3034,
2289 "Invalid status handle (0x%x).\n", handle);
2290
2291 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2292 qla2xxx_wake_dpc(vha);
2293 return;
2294 }
2295
2296 if (sp->type == SRB_TM_CMD) {
2297 req->outstanding_cmds[handle] = NULL;
2298 qlafx00_tm_iocb_entry(vha, req, pkt, sp,
2299 scsi_status, comp_status);
2300 return;
2301 }
2302
2303 /* Fast path completion. */
2304 if (comp_status == CS_COMPLETE && scsi_status == 0) {
2305 qla2x00_process_completed_request(vha, req, handle);
2306 return;
2307 }
2308
2309 req->outstanding_cmds[handle] = NULL;
2310 cp = GET_CMD_SP(sp);
2311 if (cp == NULL) {
2312 ql_dbg(ql_dbg_io, vha, 0x3048,
2313 "Command already returned (0x%x/%p).\n",
2314 handle, sp);
2315
2316 return;
2317 }
2318
2319 lscsi_status = scsi_status & cpu_to_le16((uint16_t)STATUS_MASK);
2320
2321 fcport = sp->fcport;
2322
2323 sense_len = par_sense_len = rsp_info_len = resid_len =
2324 fw_resid_len = 0;
2325 if (scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID))
2326 sense_len = sts->sense_len;
2327 if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER
2328 | (uint16_t)SS_RESIDUAL_OVER)))
2329 resid_len = le32_to_cpu(sts->residual_len);
2330 if (comp_status == cpu_to_le16((uint16_t)CS_DATA_UNDERRUN))
2331 fw_resid_len = le32_to_cpu(sts->residual_len);
2332 rsp_info = sense_data = sts->data;
2333 par_sense_len = sizeof(sts->data);
2334
2335 /* Check for overrun. */
2336 if (comp_status == CS_COMPLETE &&
2337 scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_OVER))
2338 comp_status = cpu_to_le16((uint16_t)CS_DATA_OVERRUN);
2339
2340 /*
2341 * Based on Host and scsi status generate status code for Linux
2342 */
2343 switch (le16_to_cpu(comp_status)) {
2344 case CS_COMPLETE:
2345 case CS_QUEUE_FULL:
2346 if (scsi_status == 0) {
2347 res = DID_OK << 16;
2348 break;
2349 }
2350 if (scsi_status & cpu_to_le16(((uint16_t)SS_RESIDUAL_UNDER
2351 | (uint16_t)SS_RESIDUAL_OVER))) {
2352 resid = resid_len;
2353 scsi_set_resid(cp, resid);
2354
2355 if (!lscsi_status &&
2356 ((unsigned)(scsi_bufflen(cp) - resid) <
2357 cp->underflow)) {
2358 ql_dbg(ql_dbg_io, fcport->vha, 0x3050,
2359 "Mid-layer underflow "
2360 "detected (0x%x of 0x%x bytes).\n",
2361 resid, scsi_bufflen(cp));
2362
2363 res = DID_ERROR << 16;
2364 break;
2365 }
2366 }
2367 res = DID_OK << 16 | le16_to_cpu(lscsi_status);
2368
2369 if (lscsi_status ==
2370 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) {
2371 ql_dbg(ql_dbg_io, fcport->vha, 0x3051,
2372 "QUEUE FULL detected.\n");
2373 break;
2374 }
2375 logit = 0;
2376 if (lscsi_status != cpu_to_le16((uint16_t)SS_CHECK_CONDITION))
2377 break;
2378
2379 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
2380 if (!(scsi_status & cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)))
2381 break;
2382
2383 qlafx00_handle_sense(sp, sense_data, par_sense_len, sense_len,
2384 rsp, res);
2385 break;
2386
2387 case CS_DATA_UNDERRUN:
2388 /* Use F/W calculated residual length. */
2389 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
2390 resid = fw_resid_len;
2391 else
2392 resid = resid_len;
2393 scsi_set_resid(cp, resid);
2394 if (scsi_status & cpu_to_le16((uint16_t)SS_RESIDUAL_UNDER)) {
2395 if ((IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
2396 && fw_resid_len != resid_len) {
2397 ql_dbg(ql_dbg_io, fcport->vha, 0x3052,
2398 "Dropped frame(s) detected "
2399 "(0x%x of 0x%x bytes).\n",
2400 resid, scsi_bufflen(cp));
2401
2402 res = DID_ERROR << 16 |
2403 le16_to_cpu(lscsi_status);
2404 goto check_scsi_status;
2405 }
2406
2407 if (!lscsi_status &&
2408 ((unsigned)(scsi_bufflen(cp) - resid) <
2409 cp->underflow)) {
2410 ql_dbg(ql_dbg_io, fcport->vha, 0x3053,
2411 "Mid-layer underflow "
2412 "detected (0x%x of 0x%x bytes, "
2413 "cp->underflow: 0x%x).\n",
2414 resid, scsi_bufflen(cp), cp->underflow);
2415
2416 res = DID_ERROR << 16;
2417 break;
2418 }
2419 } else if (lscsi_status !=
2420 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL) &&
2421 lscsi_status != cpu_to_le16((uint16_t)SAM_STAT_BUSY)) {
2422 /*
2423 * scsi status of task set and busy are considered
2424 * to be task not completed.
2425 */
2426
2427 ql_dbg(ql_dbg_io, fcport->vha, 0x3054,
2428 "Dropped frame(s) detected (0x%x "
2429 "of 0x%x bytes).\n", resid,
2430 scsi_bufflen(cp));
2431
2432 res = DID_ERROR << 16 | le16_to_cpu(lscsi_status);
2433 goto check_scsi_status;
2434 } else {
2435 ql_dbg(ql_dbg_io, fcport->vha, 0x3055,
2436 "scsi_status: 0x%x, lscsi_status: 0x%x\n",
2437 scsi_status, lscsi_status);
2438 }
2439
2440 res = DID_OK << 16 | le16_to_cpu(lscsi_status);
2441 logit = 0;
2442
2443 check_scsi_status:
2444 /*
2445 * Check to see if SCSI Status is non zero. If so report SCSI
2446 * Status.
2447 */
2448 if (lscsi_status != 0) {
2449 if (lscsi_status ==
2450 cpu_to_le16((uint16_t)SAM_STAT_TASK_SET_FULL)) {
2451 ql_dbg(ql_dbg_io, fcport->vha, 0x3056,
2452 "QUEUE FULL detected.\n");
2453 logit = 1;
2454 break;
2455 }
2456 if (lscsi_status !=
2457 cpu_to_le16((uint16_t)SS_CHECK_CONDITION))
2458 break;
2459
2460 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
2461 if (!(scsi_status &
2462 cpu_to_le16((uint16_t)SS_SENSE_LEN_VALID)))
2463 break;
2464
2465 qlafx00_handle_sense(sp, sense_data, par_sense_len,
2466 sense_len, rsp, res);
2467 }
2468 break;
2469
2470 case CS_PORT_LOGGED_OUT:
2471 case CS_PORT_CONFIG_CHG:
2472 case CS_PORT_BUSY:
2473 case CS_INCOMPLETE:
2474 case CS_PORT_UNAVAILABLE:
2475 case CS_TIMEOUT:
2476 case CS_RESET:
2477
2478 /*
2479 * We are going to have the fc class block the rport
2480 * while we try to recover so instruct the mid layer
2481 * to requeue until the class decides how to handle this.
2482 */
2483 res = DID_TRANSPORT_DISRUPTED << 16;
2484
2485 ql_dbg(ql_dbg_io, fcport->vha, 0x3057,
2486 "Port down status: port-state=0x%x.\n",
2487 atomic_read(&fcport->state));
2488
2489 if (atomic_read(&fcport->state) == FCS_ONLINE)
2490 qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
2491 break;
2492
2493 case CS_ABORTED:
2494 res = DID_RESET << 16;
2495 break;
2496
2497 default:
2498 res = DID_ERROR << 16;
2499 break;
2500 }
2501
2502 if (logit)
2503 ql_dbg(ql_dbg_io, fcport->vha, 0x3058,
2504 "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu "
2505 "tgt_id: 0x%x lscsi_status: 0x%x cdb=%10phN len=0x%x "
2506 "rsp_info=%p resid=0x%x fw_resid=0x%x sense_len=0x%x, "
2507 "par_sense_len=0x%x, rsp_info_len=0x%x\n",
2508 comp_status, scsi_status, res, vha->host_no,
2509 cp->device->id, cp->device->lun, fcport->tgt_id,
2510 lscsi_status, cp->cmnd, scsi_bufflen(cp),
2511 rsp_info, resid_len, fw_resid_len, sense_len,
2512 par_sense_len, rsp_info_len);
2513
2514 if (rsp->status_srb == NULL)
2515 sp->done(ha, sp, res);
2516 }
2517
2518 /**
2519 * qlafx00_status_cont_entry() - Process a Status Continuations entry.
2520 * @ha: SCSI driver HA context
2521 * @pkt: Entry pointer
2522 *
2523 * Extended sense data.
2524 */
2525 static void
qlafx00_status_cont_entry(struct rsp_que * rsp,sts_cont_entry_t * pkt)2526 qlafx00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
2527 {
2528 uint8_t sense_sz = 0;
2529 struct qla_hw_data *ha = rsp->hw;
2530 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
2531 srb_t *sp = rsp->status_srb;
2532 struct scsi_cmnd *cp;
2533 uint32_t sense_len;
2534 uint8_t *sense_ptr;
2535
2536 if (!sp) {
2537 ql_dbg(ql_dbg_io, vha, 0x3037,
2538 "no SP, sp = %p\n", sp);
2539 return;
2540 }
2541
2542 if (!GET_FW_SENSE_LEN(sp)) {
2543 ql_dbg(ql_dbg_io, vha, 0x304b,
2544 "no fw sense data, sp = %p\n", sp);
2545 return;
2546 }
2547 cp = GET_CMD_SP(sp);
2548 if (cp == NULL) {
2549 ql_log(ql_log_warn, vha, 0x303b,
2550 "cmd is NULL: already returned to OS (sp=%p).\n", sp);
2551
2552 rsp->status_srb = NULL;
2553 return;
2554 }
2555
2556 if (!GET_CMD_SENSE_LEN(sp)) {
2557 ql_dbg(ql_dbg_io, vha, 0x304c,
2558 "no sense data, sp = %p\n", sp);
2559 } else {
2560 sense_len = GET_CMD_SENSE_LEN(sp);
2561 sense_ptr = GET_CMD_SENSE_PTR(sp);
2562 ql_dbg(ql_dbg_io, vha, 0x304f,
2563 "sp=%p sense_len=0x%x sense_ptr=%p.\n",
2564 sp, sense_len, sense_ptr);
2565
2566 if (sense_len > sizeof(pkt->data))
2567 sense_sz = sizeof(pkt->data);
2568 else
2569 sense_sz = sense_len;
2570
2571 /* Move sense data. */
2572 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304e,
2573 (uint8_t *)pkt, sizeof(sts_cont_entry_t));
2574 memcpy(sense_ptr, pkt->data, sense_sz);
2575 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304a,
2576 sense_ptr, sense_sz);
2577
2578 sense_len -= sense_sz;
2579 sense_ptr += sense_sz;
2580
2581 SET_CMD_SENSE_PTR(sp, sense_ptr);
2582 SET_CMD_SENSE_LEN(sp, sense_len);
2583 }
2584 sense_len = GET_FW_SENSE_LEN(sp);
2585 sense_len = (sense_len > sizeof(pkt->data)) ?
2586 (sense_len - sizeof(pkt->data)) : 0;
2587 SET_FW_SENSE_LEN(sp, sense_len);
2588
2589 /* Place command on done queue. */
2590 if (sense_len == 0) {
2591 rsp->status_srb = NULL;
2592 sp->done(ha, sp, cp->result);
2593 }
2594 }
2595
2596 /**
2597 * qlafx00_multistatus_entry() - Process Multi response queue entries.
2598 * @ha: SCSI driver HA context
2599 */
2600 static void
qlafx00_multistatus_entry(struct scsi_qla_host * vha,struct rsp_que * rsp,void * pkt)2601 qlafx00_multistatus_entry(struct scsi_qla_host *vha,
2602 struct rsp_que *rsp, void *pkt)
2603 {
2604 srb_t *sp;
2605 struct multi_sts_entry_fx00 *stsmfx;
2606 struct qla_hw_data *ha = vha->hw;
2607 uint32_t handle, hindex, handle_count, i;
2608 uint16_t que;
2609 struct req_que *req;
2610 __le32 *handle_ptr;
2611
2612 stsmfx = (struct multi_sts_entry_fx00 *) pkt;
2613
2614 handle_count = stsmfx->handle_count;
2615
2616 if (handle_count > MAX_HANDLE_COUNT) {
2617 ql_dbg(ql_dbg_io, vha, 0x3035,
2618 "Invalid handle count (0x%x).\n", handle_count);
2619 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2620 qla2xxx_wake_dpc(vha);
2621 return;
2622 }
2623
2624 handle_ptr = &stsmfx->handles[0];
2625
2626 for (i = 0; i < handle_count; i++) {
2627 hindex = le32_to_cpu(*handle_ptr);
2628 handle = LSW(hindex);
2629 que = MSW(hindex);
2630 req = ha->req_q_map[que];
2631
2632 /* Validate handle. */
2633 if (handle < req->num_outstanding_cmds)
2634 sp = req->outstanding_cmds[handle];
2635 else
2636 sp = NULL;
2637
2638 if (sp == NULL) {
2639 ql_dbg(ql_dbg_io, vha, 0x3044,
2640 "Invalid status handle (0x%x).\n", handle);
2641 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2642 qla2xxx_wake_dpc(vha);
2643 return;
2644 }
2645 qla2x00_process_completed_request(vha, req, handle);
2646 handle_ptr++;
2647 }
2648 }
2649
2650 /**
2651 * qlafx00_error_entry() - Process an error entry.
2652 * @ha: SCSI driver HA context
2653 * @pkt: Entry pointer
2654 */
2655 static void
qlafx00_error_entry(scsi_qla_host_t * vha,struct rsp_que * rsp,struct sts_entry_fx00 * pkt,uint8_t estatus,uint8_t etype)2656 qlafx00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp,
2657 struct sts_entry_fx00 *pkt, uint8_t estatus, uint8_t etype)
2658 {
2659 srb_t *sp;
2660 struct qla_hw_data *ha = vha->hw;
2661 const char func[] = "ERROR-IOCB";
2662 uint16_t que = 0;
2663 struct req_que *req = NULL;
2664 int res = DID_ERROR << 16;
2665
2666 ql_dbg(ql_dbg_async, vha, 0x507f,
2667 "type of error status in response: 0x%x\n", estatus);
2668
2669 req = ha->req_q_map[que];
2670
2671 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2672 if (sp) {
2673 sp->done(ha, sp, res);
2674 return;
2675 }
2676
2677 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2678 qla2xxx_wake_dpc(vha);
2679 }
2680
2681 /**
2682 * qlafx00_process_response_queue() - Process response queue entries.
2683 * @ha: SCSI driver HA context
2684 */
2685 static void
qlafx00_process_response_queue(struct scsi_qla_host * vha,struct rsp_que * rsp)2686 qlafx00_process_response_queue(struct scsi_qla_host *vha,
2687 struct rsp_que *rsp)
2688 {
2689 struct sts_entry_fx00 *pkt;
2690 response_t *lptr;
2691 uint16_t lreq_q_in = 0;
2692 uint16_t lreq_q_out = 0;
2693
2694 lreq_q_in = RD_REG_DWORD(rsp->rsp_q_in);
2695 lreq_q_out = rsp->ring_index;
2696
2697 while (lreq_q_in != lreq_q_out) {
2698 lptr = rsp->ring_ptr;
2699 memcpy_fromio(rsp->rsp_pkt, (void __iomem *)lptr,
2700 sizeof(rsp->rsp_pkt));
2701 pkt = (struct sts_entry_fx00 *)rsp->rsp_pkt;
2702
2703 rsp->ring_index++;
2704 lreq_q_out++;
2705 if (rsp->ring_index == rsp->length) {
2706 lreq_q_out = 0;
2707 rsp->ring_index = 0;
2708 rsp->ring_ptr = rsp->ring;
2709 } else {
2710 rsp->ring_ptr++;
2711 }
2712
2713 if (pkt->entry_status != 0 &&
2714 pkt->entry_type != IOCTL_IOSB_TYPE_FX00) {
2715 qlafx00_error_entry(vha, rsp,
2716 (struct sts_entry_fx00 *)pkt, pkt->entry_status,
2717 pkt->entry_type);
2718 continue;
2719 }
2720
2721 switch (pkt->entry_type) {
2722 case STATUS_TYPE_FX00:
2723 qlafx00_status_entry(vha, rsp, pkt);
2724 break;
2725
2726 case STATUS_CONT_TYPE_FX00:
2727 qlafx00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
2728 break;
2729
2730 case MULTI_STATUS_TYPE_FX00:
2731 qlafx00_multistatus_entry(vha, rsp, pkt);
2732 break;
2733
2734 case ABORT_IOCB_TYPE_FX00:
2735 qlafx00_abort_iocb_entry(vha, rsp->req,
2736 (struct abort_iocb_entry_fx00 *)pkt);
2737 break;
2738
2739 case IOCTL_IOSB_TYPE_FX00:
2740 qlafx00_ioctl_iosb_entry(vha, rsp->req,
2741 (struct ioctl_iocb_entry_fx00 *)pkt);
2742 break;
2743 default:
2744 /* Type Not Supported. */
2745 ql_dbg(ql_dbg_async, vha, 0x5081,
2746 "Received unknown response pkt type %x "
2747 "entry status=%x.\n",
2748 pkt->entry_type, pkt->entry_status);
2749 break;
2750 }
2751 }
2752
2753 /* Adjust ring index */
2754 WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index);
2755 }
2756
2757 /**
2758 * qlafx00_async_event() - Process aynchronous events.
2759 * @ha: SCSI driver HA context
2760 */
2761 static void
qlafx00_async_event(scsi_qla_host_t * vha)2762 qlafx00_async_event(scsi_qla_host_t *vha)
2763 {
2764 struct qla_hw_data *ha = vha->hw;
2765 struct device_reg_fx00 __iomem *reg;
2766 int data_size = 1;
2767
2768 reg = &ha->iobase->ispfx00;
2769 /* Setup to process RIO completion. */
2770 switch (ha->aenmb[0]) {
2771 case QLAFX00_MBA_SYSTEM_ERR: /* System Error */
2772 ql_log(ql_log_warn, vha, 0x5079,
2773 "ISP System Error - mbx1=%x\n", ha->aenmb[0]);
2774 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2775 break;
2776
2777 case QLAFX00_MBA_SHUTDOWN_RQSTD: /* Shutdown requested */
2778 ql_dbg(ql_dbg_async, vha, 0x5076,
2779 "Asynchronous FW shutdown requested.\n");
2780 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2781 qla2xxx_wake_dpc(vha);
2782 break;
2783
2784 case QLAFX00_MBA_PORT_UPDATE: /* Port database update */
2785 ha->aenmb[1] = RD_REG_DWORD(®->aenmailbox1);
2786 ha->aenmb[2] = RD_REG_DWORD(®->aenmailbox2);
2787 ha->aenmb[3] = RD_REG_DWORD(®->aenmailbox3);
2788 ql_dbg(ql_dbg_async, vha, 0x5077,
2789 "Asynchronous port Update received "
2790 "aenmb[0]: %x, aenmb[1]: %x, aenmb[2]: %x, aenmb[3]: %x\n",
2791 ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3]);
2792 data_size = 4;
2793 break;
2794
2795 case QLAFX00_MBA_TEMP_OVER: /* Over temperature event */
2796 ql_log(ql_log_info, vha, 0x5085,
2797 "Asynchronous over temperature event received "
2798 "aenmb[0]: %x\n",
2799 ha->aenmb[0]);
2800 break;
2801
2802 case QLAFX00_MBA_TEMP_NORM: /* Normal temperature event */
2803 ql_log(ql_log_info, vha, 0x5086,
2804 "Asynchronous normal temperature event received "
2805 "aenmb[0]: %x\n",
2806 ha->aenmb[0]);
2807 break;
2808
2809 case QLAFX00_MBA_TEMP_CRIT: /* Critical temperature event */
2810 ql_log(ql_log_info, vha, 0x5083,
2811 "Asynchronous critical temperature event received "
2812 "aenmb[0]: %x\n",
2813 ha->aenmb[0]);
2814 break;
2815
2816 default:
2817 ha->aenmb[1] = RD_REG_WORD(®->aenmailbox1);
2818 ha->aenmb[2] = RD_REG_WORD(®->aenmailbox2);
2819 ha->aenmb[3] = RD_REG_WORD(®->aenmailbox3);
2820 ha->aenmb[4] = RD_REG_WORD(®->aenmailbox4);
2821 ha->aenmb[5] = RD_REG_WORD(®->aenmailbox5);
2822 ha->aenmb[6] = RD_REG_WORD(®->aenmailbox6);
2823 ha->aenmb[7] = RD_REG_WORD(®->aenmailbox7);
2824 ql_dbg(ql_dbg_async, vha, 0x5078,
2825 "AEN:%04x %04x %04x %04x :%04x %04x %04x %04x\n",
2826 ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3],
2827 ha->aenmb[4], ha->aenmb[5], ha->aenmb[6], ha->aenmb[7]);
2828 break;
2829 }
2830 qlafx00_post_aenfx_work(vha, ha->aenmb[0],
2831 (uint32_t *)ha->aenmb, data_size);
2832 }
2833
2834 /**
2835 *
2836 * qlafx00x_mbx_completion() - Process mailbox command completions.
2837 * @ha: SCSI driver HA context
2838 * @mb16: Mailbox16 register
2839 */
2840 static void
qlafx00_mbx_completion(scsi_qla_host_t * vha,uint32_t mb0)2841 qlafx00_mbx_completion(scsi_qla_host_t *vha, uint32_t mb0)
2842 {
2843 uint16_t cnt;
2844 uint32_t __iomem *wptr;
2845 struct qla_hw_data *ha = vha->hw;
2846 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
2847
2848 if (!ha->mcp32)
2849 ql_dbg(ql_dbg_async, vha, 0x507e, "MBX pointer ERROR.\n");
2850
2851 /* Load return mailbox registers. */
2852 ha->flags.mbox_int = 1;
2853 ha->mailbox_out32[0] = mb0;
2854 wptr = (uint32_t __iomem *)®->mailbox17;
2855
2856 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
2857 ha->mailbox_out32[cnt] = RD_REG_DWORD(wptr);
2858 wptr++;
2859 }
2860 }
2861
2862 /**
2863 * qlafx00_intr_handler() - Process interrupts for the ISPFX00.
2864 * @irq:
2865 * @dev_id: SCSI driver HA context
2866 *
2867 * Called by system whenever the host adapter generates an interrupt.
2868 *
2869 * Returns handled flag.
2870 */
2871 irqreturn_t
qlafx00_intr_handler(int irq,void * dev_id)2872 qlafx00_intr_handler(int irq, void *dev_id)
2873 {
2874 scsi_qla_host_t *vha;
2875 struct qla_hw_data *ha;
2876 struct device_reg_fx00 __iomem *reg;
2877 int status;
2878 unsigned long iter;
2879 uint32_t stat;
2880 uint32_t mb[8];
2881 struct rsp_que *rsp;
2882 unsigned long flags;
2883 uint32_t clr_intr = 0;
2884 uint32_t intr_stat = 0;
2885
2886 rsp = (struct rsp_que *) dev_id;
2887 if (!rsp) {
2888 ql_log(ql_log_info, NULL, 0x507d,
2889 "%s: NULL response queue pointer.\n", __func__);
2890 return IRQ_NONE;
2891 }
2892
2893 ha = rsp->hw;
2894 reg = &ha->iobase->ispfx00;
2895 status = 0;
2896
2897 if (unlikely(pci_channel_offline(ha->pdev)))
2898 return IRQ_HANDLED;
2899
2900 spin_lock_irqsave(&ha->hardware_lock, flags);
2901 vha = pci_get_drvdata(ha->pdev);
2902 for (iter = 50; iter--; clr_intr = 0) {
2903 stat = QLAFX00_RD_INTR_REG(ha);
2904 if (qla2x00_check_reg32_for_disconnect(vha, stat))
2905 break;
2906 intr_stat = stat & QLAFX00_HST_INT_STS_BITS;
2907 if (!intr_stat)
2908 break;
2909
2910 if (stat & QLAFX00_INTR_MB_CMPLT) {
2911 mb[0] = RD_REG_WORD(®->mailbox16);
2912 qlafx00_mbx_completion(vha, mb[0]);
2913 status |= MBX_INTERRUPT;
2914 clr_intr |= QLAFX00_INTR_MB_CMPLT;
2915 }
2916 if (intr_stat & QLAFX00_INTR_ASYNC_CMPLT) {
2917 ha->aenmb[0] = RD_REG_WORD(®->aenmailbox0);
2918 qlafx00_async_event(vha);
2919 clr_intr |= QLAFX00_INTR_ASYNC_CMPLT;
2920 }
2921 if (intr_stat & QLAFX00_INTR_RSP_CMPLT) {
2922 qlafx00_process_response_queue(vha, rsp);
2923 clr_intr |= QLAFX00_INTR_RSP_CMPLT;
2924 }
2925
2926 QLAFX00_CLR_INTR_REG(ha, clr_intr);
2927 QLAFX00_RD_INTR_REG(ha);
2928 }
2929
2930 qla2x00_handle_mbx_completion(ha, status);
2931 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2932
2933 return IRQ_HANDLED;
2934 }
2935
2936 /** QLAFX00 specific IOCB implementation functions */
2937
2938 static inline cont_a64_entry_t *
qlafx00_prep_cont_type1_iocb(struct req_que * req,cont_a64_entry_t * lcont_pkt)2939 qlafx00_prep_cont_type1_iocb(struct req_que *req,
2940 cont_a64_entry_t *lcont_pkt)
2941 {
2942 cont_a64_entry_t *cont_pkt;
2943
2944 /* Adjust ring index. */
2945 req->ring_index++;
2946 if (req->ring_index == req->length) {
2947 req->ring_index = 0;
2948 req->ring_ptr = req->ring;
2949 } else {
2950 req->ring_ptr++;
2951 }
2952
2953 cont_pkt = (cont_a64_entry_t *)req->ring_ptr;
2954
2955 /* Load packet defaults. */
2956 lcont_pkt->entry_type = CONTINUE_A64_TYPE_FX00;
2957
2958 return cont_pkt;
2959 }
2960
2961 static inline void
qlafx00_build_scsi_iocbs(srb_t * sp,struct cmd_type_7_fx00 * cmd_pkt,uint16_t tot_dsds,struct cmd_type_7_fx00 * lcmd_pkt)2962 qlafx00_build_scsi_iocbs(srb_t *sp, struct cmd_type_7_fx00 *cmd_pkt,
2963 uint16_t tot_dsds, struct cmd_type_7_fx00 *lcmd_pkt)
2964 {
2965 uint16_t avail_dsds;
2966 __le32 *cur_dsd;
2967 scsi_qla_host_t *vha;
2968 struct scsi_cmnd *cmd;
2969 struct scatterlist *sg;
2970 int i, cont;
2971 struct req_que *req;
2972 cont_a64_entry_t lcont_pkt;
2973 cont_a64_entry_t *cont_pkt;
2974
2975 vha = sp->fcport->vha;
2976 req = vha->req;
2977
2978 cmd = GET_CMD_SP(sp);
2979 cont = 0;
2980 cont_pkt = NULL;
2981
2982 /* Update entry type to indicate Command Type 3 IOCB */
2983 lcmd_pkt->entry_type = FX00_COMMAND_TYPE_7;
2984
2985 /* No data transfer */
2986 if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
2987 lcmd_pkt->byte_count = cpu_to_le32(0);
2988 return;
2989 }
2990
2991 /* Set transfer direction */
2992 if (cmd->sc_data_direction == DMA_TO_DEVICE) {
2993 lcmd_pkt->cntrl_flags = TMF_WRITE_DATA;
2994 vha->qla_stats.output_bytes += scsi_bufflen(cmd);
2995 } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
2996 lcmd_pkt->cntrl_flags = TMF_READ_DATA;
2997 vha->qla_stats.input_bytes += scsi_bufflen(cmd);
2998 }
2999
3000 /* One DSD is available in the Command Type 3 IOCB */
3001 avail_dsds = 1;
3002 cur_dsd = (__le32 *)&lcmd_pkt->dseg_0_address;
3003
3004 /* Load data segments */
3005 scsi_for_each_sg(cmd, sg, tot_dsds, i) {
3006 dma_addr_t sle_dma;
3007
3008 /* Allocate additional continuation packets? */
3009 if (avail_dsds == 0) {
3010 /*
3011 * Five DSDs are available in the Continuation
3012 * Type 1 IOCB.
3013 */
3014 memset(&lcont_pkt, 0, REQUEST_ENTRY_SIZE);
3015 cont_pkt =
3016 qlafx00_prep_cont_type1_iocb(req, &lcont_pkt);
3017 cur_dsd = (__le32 *)lcont_pkt.dseg_0_address;
3018 avail_dsds = 5;
3019 cont = 1;
3020 }
3021
3022 sle_dma = sg_dma_address(sg);
3023 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3024 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3025 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3026 avail_dsds--;
3027 if (avail_dsds == 0 && cont == 1) {
3028 cont = 0;
3029 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt,
3030 REQUEST_ENTRY_SIZE);
3031 }
3032
3033 }
3034 if (avail_dsds != 0 && cont == 1) {
3035 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt,
3036 REQUEST_ENTRY_SIZE);
3037 }
3038 }
3039
3040 /**
3041 * qlafx00_start_scsi() - Send a SCSI command to the ISP
3042 * @sp: command to send to the ISP
3043 *
3044 * Returns non-zero if a failure occurred, else zero.
3045 */
3046 int
qlafx00_start_scsi(srb_t * sp)3047 qlafx00_start_scsi(srb_t *sp)
3048 {
3049 int nseg;
3050 unsigned long flags;
3051 uint32_t index;
3052 uint32_t handle;
3053 uint16_t cnt;
3054 uint16_t req_cnt;
3055 uint16_t tot_dsds;
3056 struct req_que *req = NULL;
3057 struct rsp_que *rsp = NULL;
3058 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
3059 struct scsi_qla_host *vha = sp->fcport->vha;
3060 struct qla_hw_data *ha = vha->hw;
3061 struct cmd_type_7_fx00 *cmd_pkt;
3062 struct cmd_type_7_fx00 lcmd_pkt;
3063 struct scsi_lun llun;
3064
3065 /* Setup device pointers. */
3066 rsp = ha->rsp_q_map[0];
3067 req = vha->req;
3068
3069 /* So we know we haven't pci_map'ed anything yet */
3070 tot_dsds = 0;
3071
3072 /* Acquire ring specific lock */
3073 spin_lock_irqsave(&ha->hardware_lock, flags);
3074
3075 /* Check for room in outstanding command list. */
3076 handle = req->current_outstanding_cmd;
3077 for (index = 1; index < req->num_outstanding_cmds; index++) {
3078 handle++;
3079 if (handle == req->num_outstanding_cmds)
3080 handle = 1;
3081 if (!req->outstanding_cmds[handle])
3082 break;
3083 }
3084 if (index == req->num_outstanding_cmds)
3085 goto queuing_error;
3086
3087 /* Map the sg table so we have an accurate count of sg entries needed */
3088 if (scsi_sg_count(cmd)) {
3089 nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
3090 scsi_sg_count(cmd), cmd->sc_data_direction);
3091 if (unlikely(!nseg))
3092 goto queuing_error;
3093 } else
3094 nseg = 0;
3095
3096 tot_dsds = nseg;
3097 req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
3098 if (req->cnt < (req_cnt + 2)) {
3099 cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
3100
3101 if (req->ring_index < cnt)
3102 req->cnt = cnt - req->ring_index;
3103 else
3104 req->cnt = req->length -
3105 (req->ring_index - cnt);
3106 if (req->cnt < (req_cnt + 2))
3107 goto queuing_error;
3108 }
3109
3110 /* Build command packet. */
3111 req->current_outstanding_cmd = handle;
3112 req->outstanding_cmds[handle] = sp;
3113 sp->handle = handle;
3114 cmd->host_scribble = (unsigned char *)(unsigned long)handle;
3115 req->cnt -= req_cnt;
3116
3117 cmd_pkt = (struct cmd_type_7_fx00 *)req->ring_ptr;
3118
3119 memset(&lcmd_pkt, 0, REQUEST_ENTRY_SIZE);
3120
3121 lcmd_pkt.handle = MAKE_HANDLE(req->id, sp->handle);
3122 lcmd_pkt.reserved_0 = 0;
3123 lcmd_pkt.port_path_ctrl = 0;
3124 lcmd_pkt.reserved_1 = 0;
3125 lcmd_pkt.dseg_count = cpu_to_le16(tot_dsds);
3126 lcmd_pkt.tgt_idx = cpu_to_le16(sp->fcport->tgt_id);
3127
3128 int_to_scsilun(cmd->device->lun, &llun);
3129 host_to_adap((uint8_t *)&llun, (uint8_t *)&lcmd_pkt.lun,
3130 sizeof(lcmd_pkt.lun));
3131
3132 /* Load SCSI command packet. */
3133 host_to_adap(cmd->cmnd, lcmd_pkt.fcp_cdb, sizeof(lcmd_pkt.fcp_cdb));
3134 lcmd_pkt.byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
3135
3136 /* Build IOCB segments */
3137 qlafx00_build_scsi_iocbs(sp, cmd_pkt, tot_dsds, &lcmd_pkt);
3138
3139 /* Set total data segment count. */
3140 lcmd_pkt.entry_count = (uint8_t)req_cnt;
3141
3142 /* Specify response queue number where completion should happen */
3143 lcmd_pkt.entry_status = (uint8_t) rsp->id;
3144
3145 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302e,
3146 (uint8_t *)cmd->cmnd, cmd->cmd_len);
3147 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3032,
3148 (uint8_t *)&lcmd_pkt, REQUEST_ENTRY_SIZE);
3149
3150 memcpy_toio((void __iomem *)cmd_pkt, &lcmd_pkt, REQUEST_ENTRY_SIZE);
3151 wmb();
3152
3153 /* Adjust ring index. */
3154 req->ring_index++;
3155 if (req->ring_index == req->length) {
3156 req->ring_index = 0;
3157 req->ring_ptr = req->ring;
3158 } else
3159 req->ring_ptr++;
3160
3161 sp->flags |= SRB_DMA_VALID;
3162
3163 /* Set chip new ring index. */
3164 WRT_REG_DWORD(req->req_q_in, req->ring_index);
3165 QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code);
3166
3167 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3168 return QLA_SUCCESS;
3169
3170 queuing_error:
3171 if (tot_dsds)
3172 scsi_dma_unmap(cmd);
3173
3174 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3175
3176 return QLA_FUNCTION_FAILED;
3177 }
3178
3179 void
qlafx00_tm_iocb(srb_t * sp,struct tsk_mgmt_entry_fx00 * ptm_iocb)3180 qlafx00_tm_iocb(srb_t *sp, struct tsk_mgmt_entry_fx00 *ptm_iocb)
3181 {
3182 struct srb_iocb *fxio = &sp->u.iocb_cmd;
3183 scsi_qla_host_t *vha = sp->fcport->vha;
3184 struct req_que *req = vha->req;
3185 struct tsk_mgmt_entry_fx00 tm_iocb;
3186 struct scsi_lun llun;
3187
3188 memset(&tm_iocb, 0, sizeof(struct tsk_mgmt_entry_fx00));
3189 tm_iocb.entry_type = TSK_MGMT_IOCB_TYPE_FX00;
3190 tm_iocb.entry_count = 1;
3191 tm_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle));
3192 tm_iocb.reserved_0 = 0;
3193 tm_iocb.tgt_id = cpu_to_le16(sp->fcport->tgt_id);
3194 tm_iocb.control_flags = cpu_to_le32(fxio->u.tmf.flags);
3195 if (tm_iocb.control_flags == cpu_to_le32((uint32_t)TCF_LUN_RESET)) {
3196 int_to_scsilun(fxio->u.tmf.lun, &llun);
3197 host_to_adap((uint8_t *)&llun, (uint8_t *)&tm_iocb.lun,
3198 sizeof(struct scsi_lun));
3199 }
3200
3201 memcpy((void *)ptm_iocb, &tm_iocb,
3202 sizeof(struct tsk_mgmt_entry_fx00));
3203 wmb();
3204 }
3205
3206 void
qlafx00_abort_iocb(srb_t * sp,struct abort_iocb_entry_fx00 * pabt_iocb)3207 qlafx00_abort_iocb(srb_t *sp, struct abort_iocb_entry_fx00 *pabt_iocb)
3208 {
3209 struct srb_iocb *fxio = &sp->u.iocb_cmd;
3210 scsi_qla_host_t *vha = sp->fcport->vha;
3211 struct req_que *req = vha->req;
3212 struct abort_iocb_entry_fx00 abt_iocb;
3213
3214 memset(&abt_iocb, 0, sizeof(struct abort_iocb_entry_fx00));
3215 abt_iocb.entry_type = ABORT_IOCB_TYPE_FX00;
3216 abt_iocb.entry_count = 1;
3217 abt_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle));
3218 abt_iocb.abort_handle =
3219 cpu_to_le32(MAKE_HANDLE(req->id, fxio->u.abt.cmd_hndl));
3220 abt_iocb.tgt_id_sts = cpu_to_le16(sp->fcport->tgt_id);
3221 abt_iocb.req_que_no = cpu_to_le16(req->id);
3222
3223 memcpy((void *)pabt_iocb, &abt_iocb,
3224 sizeof(struct abort_iocb_entry_fx00));
3225 wmb();
3226 }
3227
3228 void
qlafx00_fxdisc_iocb(srb_t * sp,struct fxdisc_entry_fx00 * pfxiocb)3229 qlafx00_fxdisc_iocb(srb_t *sp, struct fxdisc_entry_fx00 *pfxiocb)
3230 {
3231 struct srb_iocb *fxio = &sp->u.iocb_cmd;
3232 struct qla_mt_iocb_rqst_fx00 *piocb_rqst;
3233 struct fc_bsg_job *bsg_job;
3234 struct fxdisc_entry_fx00 fx_iocb;
3235 uint8_t entry_cnt = 1;
3236
3237 memset(&fx_iocb, 0, sizeof(struct fxdisc_entry_fx00));
3238 fx_iocb.entry_type = FX00_IOCB_TYPE;
3239 fx_iocb.handle = cpu_to_le32(sp->handle);
3240 fx_iocb.entry_count = entry_cnt;
3241
3242 if (sp->type == SRB_FXIOCB_DCMD) {
3243 fx_iocb.func_num =
3244 sp->u.iocb_cmd.u.fxiocb.req_func_type;
3245 fx_iocb.adapid = fxio->u.fxiocb.adapter_id;
3246 fx_iocb.adapid_hi = fxio->u.fxiocb.adapter_id_hi;
3247 fx_iocb.reserved_0 = fxio->u.fxiocb.reserved_0;
3248 fx_iocb.reserved_1 = fxio->u.fxiocb.reserved_1;
3249 fx_iocb.dataword_extra = fxio->u.fxiocb.req_data_extra;
3250
3251 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) {
3252 fx_iocb.req_dsdcnt = cpu_to_le16(1);
3253 fx_iocb.req_xfrcnt =
3254 cpu_to_le16(fxio->u.fxiocb.req_len);
3255 fx_iocb.dseg_rq_address[0] =
3256 cpu_to_le32(LSD(fxio->u.fxiocb.req_dma_handle));
3257 fx_iocb.dseg_rq_address[1] =
3258 cpu_to_le32(MSD(fxio->u.fxiocb.req_dma_handle));
3259 fx_iocb.dseg_rq_len =
3260 cpu_to_le32(fxio->u.fxiocb.req_len);
3261 }
3262
3263 if (fxio->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) {
3264 fx_iocb.rsp_dsdcnt = cpu_to_le16(1);
3265 fx_iocb.rsp_xfrcnt =
3266 cpu_to_le16(fxio->u.fxiocb.rsp_len);
3267 fx_iocb.dseg_rsp_address[0] =
3268 cpu_to_le32(LSD(fxio->u.fxiocb.rsp_dma_handle));
3269 fx_iocb.dseg_rsp_address[1] =
3270 cpu_to_le32(MSD(fxio->u.fxiocb.rsp_dma_handle));
3271 fx_iocb.dseg_rsp_len =
3272 cpu_to_le32(fxio->u.fxiocb.rsp_len);
3273 }
3274
3275 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DWRD_VALID) {
3276 fx_iocb.dataword = fxio->u.fxiocb.req_data;
3277 }
3278 fx_iocb.flags = fxio->u.fxiocb.flags;
3279 } else {
3280 struct scatterlist *sg;
3281 bsg_job = sp->u.bsg_job;
3282 piocb_rqst = (struct qla_mt_iocb_rqst_fx00 *)
3283 &bsg_job->request->rqst_data.h_vendor.vendor_cmd[1];
3284
3285 fx_iocb.func_num = piocb_rqst->func_type;
3286 fx_iocb.adapid = piocb_rqst->adapid;
3287 fx_iocb.adapid_hi = piocb_rqst->adapid_hi;
3288 fx_iocb.reserved_0 = piocb_rqst->reserved_0;
3289 fx_iocb.reserved_1 = piocb_rqst->reserved_1;
3290 fx_iocb.dataword_extra = piocb_rqst->dataword_extra;
3291 fx_iocb.dataword = piocb_rqst->dataword;
3292 fx_iocb.req_xfrcnt = piocb_rqst->req_len;
3293 fx_iocb.rsp_xfrcnt = piocb_rqst->rsp_len;
3294
3295 if (piocb_rqst->flags & SRB_FXDISC_REQ_DMA_VALID) {
3296 int avail_dsds, tot_dsds;
3297 cont_a64_entry_t lcont_pkt;
3298 cont_a64_entry_t *cont_pkt = NULL;
3299 __le32 *cur_dsd;
3300 int index = 0, cont = 0;
3301
3302 fx_iocb.req_dsdcnt =
3303 cpu_to_le16(bsg_job->request_payload.sg_cnt);
3304 tot_dsds =
3305 bsg_job->request_payload.sg_cnt;
3306 cur_dsd = (__le32 *)&fx_iocb.dseg_rq_address[0];
3307 avail_dsds = 1;
3308 for_each_sg(bsg_job->request_payload.sg_list, sg,
3309 tot_dsds, index) {
3310 dma_addr_t sle_dma;
3311
3312 /* Allocate additional continuation packets? */
3313 if (avail_dsds == 0) {
3314 /*
3315 * Five DSDs are available in the Cont.
3316 * Type 1 IOCB.
3317 */
3318 memset(&lcont_pkt, 0,
3319 REQUEST_ENTRY_SIZE);
3320 cont_pkt =
3321 qlafx00_prep_cont_type1_iocb(
3322 sp->fcport->vha->req,
3323 &lcont_pkt);
3324 cur_dsd = (__le32 *)
3325 lcont_pkt.dseg_0_address;
3326 avail_dsds = 5;
3327 cont = 1;
3328 entry_cnt++;
3329 }
3330
3331 sle_dma = sg_dma_address(sg);
3332 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3333 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3334 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3335 avail_dsds--;
3336
3337 if (avail_dsds == 0 && cont == 1) {
3338 cont = 0;
3339 memcpy_toio(
3340 (void __iomem *)cont_pkt,
3341 &lcont_pkt, REQUEST_ENTRY_SIZE);
3342 ql_dump_buffer(
3343 ql_dbg_user + ql_dbg_verbose,
3344 sp->fcport->vha, 0x3042,
3345 (uint8_t *)&lcont_pkt,
3346 REQUEST_ENTRY_SIZE);
3347 }
3348 }
3349 if (avail_dsds != 0 && cont == 1) {
3350 memcpy_toio((void __iomem *)cont_pkt,
3351 &lcont_pkt, REQUEST_ENTRY_SIZE);
3352 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3353 sp->fcport->vha, 0x3043,
3354 (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE);
3355 }
3356 }
3357
3358 if (piocb_rqst->flags & SRB_FXDISC_RESP_DMA_VALID) {
3359 int avail_dsds, tot_dsds;
3360 cont_a64_entry_t lcont_pkt;
3361 cont_a64_entry_t *cont_pkt = NULL;
3362 __le32 *cur_dsd;
3363 int index = 0, cont = 0;
3364
3365 fx_iocb.rsp_dsdcnt =
3366 cpu_to_le16(bsg_job->reply_payload.sg_cnt);
3367 tot_dsds = bsg_job->reply_payload.sg_cnt;
3368 cur_dsd = (__le32 *)&fx_iocb.dseg_rsp_address[0];
3369 avail_dsds = 1;
3370
3371 for_each_sg(bsg_job->reply_payload.sg_list, sg,
3372 tot_dsds, index) {
3373 dma_addr_t sle_dma;
3374
3375 /* Allocate additional continuation packets? */
3376 if (avail_dsds == 0) {
3377 /*
3378 * Five DSDs are available in the Cont.
3379 * Type 1 IOCB.
3380 */
3381 memset(&lcont_pkt, 0,
3382 REQUEST_ENTRY_SIZE);
3383 cont_pkt =
3384 qlafx00_prep_cont_type1_iocb(
3385 sp->fcport->vha->req,
3386 &lcont_pkt);
3387 cur_dsd = (__le32 *)
3388 lcont_pkt.dseg_0_address;
3389 avail_dsds = 5;
3390 cont = 1;
3391 entry_cnt++;
3392 }
3393
3394 sle_dma = sg_dma_address(sg);
3395 *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
3396 *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
3397 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
3398 avail_dsds--;
3399
3400 if (avail_dsds == 0 && cont == 1) {
3401 cont = 0;
3402 memcpy_toio((void __iomem *)cont_pkt,
3403 &lcont_pkt,
3404 REQUEST_ENTRY_SIZE);
3405 ql_dump_buffer(
3406 ql_dbg_user + ql_dbg_verbose,
3407 sp->fcport->vha, 0x3045,
3408 (uint8_t *)&lcont_pkt,
3409 REQUEST_ENTRY_SIZE);
3410 }
3411 }
3412 if (avail_dsds != 0 && cont == 1) {
3413 memcpy_toio((void __iomem *)cont_pkt,
3414 &lcont_pkt, REQUEST_ENTRY_SIZE);
3415 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3416 sp->fcport->vha, 0x3046,
3417 (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE);
3418 }
3419 }
3420
3421 if (piocb_rqst->flags & SRB_FXDISC_REQ_DWRD_VALID)
3422 fx_iocb.dataword = piocb_rqst->dataword;
3423 fx_iocb.flags = piocb_rqst->flags;
3424 fx_iocb.entry_count = entry_cnt;
3425 }
3426
3427 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose,
3428 sp->fcport->vha, 0x3047,
3429 (uint8_t *)&fx_iocb, sizeof(struct fxdisc_entry_fx00));
3430
3431 memcpy_toio((void __iomem *)pfxiocb, &fx_iocb,
3432 sizeof(struct fxdisc_entry_fx00));
3433 wmb();
3434 }
3435