Lines Matching refs:d
13 or.d \BITS, \OUTREG
18 move.d CONFIG_ETRAX_DEF_GIO_PA_OUT, $r0
19 move.d REG_ADDR(gio, regi_gio, rw_pa_dout), $r1
20 move.d $r0, [$r1]
22 move.d CONFIG_ETRAX_DEF_GIO_PA_OE, $r0
23 move.d REG_ADDR(gio, regi_gio, rw_pa_oe), $r1
24 move.d $r0, [$r1]
26 move.d CONFIG_ETRAX_DEF_GIO_PB_OUT, $r0
27 move.d REG_ADDR(gio, regi_gio, rw_pb_dout), $r1
28 move.d $r0, [$r1]
30 move.d CONFIG_ETRAX_DEF_GIO_PB_OE, $r0
31 move.d REG_ADDR(gio, regi_gio, rw_pb_oe), $r1
32 move.d $r0, [$r1]
34 move.d CONFIG_ETRAX_DEF_GIO_PC_OUT, $r0
35 move.d REG_ADDR(gio, regi_gio, rw_pc_dout), $r1
36 move.d $r0, [$r1]
38 move.d CONFIG_ETRAX_DEF_GIO_PC_OE, $r0
39 move.d REG_ADDR(gio, regi_gio, rw_pc_oe), $r1
40 move.d $r0, [$r1]
42 move.d 0xFFFFFFFF, $r0
43 move.d REG_ADDR(pinmux, regi_pinmux, rw_gio_pa), $r1
44 move.d $r0, [$r1]
45 move.d REG_ADDR(pinmux, regi_pinmux, rw_gio_pc), $r1
46 move.d $r0, [$r1]
51 move.d 0xFC000000, $r2 ; pins 25..0 are eth_mdio, eth, geth
52 move.d REG_ADDR(pinmux, regi_pinmux, rw_hwprot), $r1
53 move.d [$r1], $r0
60 move.d REG_ADDR(pinmux, regi_pinmux, rw_gio_pb), $r1
61 move.d $r2, [$r1]
65 move.d REG_ADDR(clkgen, regi_clkgen, rw_clk_ctrl), $r1
66 move.d [$r1], $r0
67 or.d REG_STATE(clkgen, rw_clk_ctrl, cpu, yes) | \
70 move.d $r0, [$r1]
74 move.d REG_ADDR(pio, regi_pio, rw_ce0_cfg), $r0
75 move.d CONFIG_ETRAX_PIO_CE0_CFG, $r1
76 move.d $r1, [$r0]
77 move.d REG_ADDR(pio, regi_pio, rw_ce1_cfg), $r0
78 move.d CONFIG_ETRAX_PIO_CE1_CFG, $r1
79 move.d $r1, [$r0]
80 move.d REG_ADDR(pio, regi_pio, rw_ce2_cfg), $r0
81 move.d CONFIG_ETRAX_PIO_CE2_CFG, $r1
82 move.d $r1, [$r0]