1060 	u32 rt, rd, sel;  in kvm_mips_emulate_CP0()  local
1100 		sel = inst.c0r_format.sel;  in kvm_mips_emulate_CP0()
1105 			cop0->stat[rd][sel]++;  in kvm_mips_emulate_CP0()
1108 			if ((rd == MIPS_CP0_COUNT) && (sel == 0)) {  in kvm_mips_emulate_CP0()
1111 			} else if ((rd == MIPS_CP0_ERRCTL) && (sel == 0)) {  in kvm_mips_emulate_CP0()
1117 				vcpu->arch.gprs[rt] = (s32)cop0->reg[rd][sel];  in kvm_mips_emulate_CP0()
1125 				      KVM_TRACE_COP0(rd, sel),  in kvm_mips_emulate_CP0()
1130 			vcpu->arch.gprs[rt] = cop0->reg[rd][sel];  in kvm_mips_emulate_CP0()
1133 				      KVM_TRACE_COP0(rd, sel),  in kvm_mips_emulate_CP0()
1139 			cop0->stat[rd][sel]++;  in kvm_mips_emulate_CP0()
1142 				      KVM_TRACE_COP0(rd, sel),  in kvm_mips_emulate_CP0()
1154 			if ((rd == MIPS_CP0_PRID) && (sel == 1)) {  in kvm_mips_emulate_CP0()
1161 			} else if (rd == MIPS_CP0_TLB_HI && sel == 0) {  in kvm_mips_emulate_CP0()
1194 			else if ((rd == MIPS_CP0_COUNT) && (sel == 0)) {  in kvm_mips_emulate_CP0()
1197 			} else if ((rd == MIPS_CP0_COMPARE) && (sel == 0)) {  in kvm_mips_emulate_CP0()
1203 			} else if ((rd == MIPS_CP0_STATUS) && (sel == 0)) {  in kvm_mips_emulate_CP0()
1275 			} else if ((rd == MIPS_CP0_CONFIG) && (sel == 5)) {  in kvm_mips_emulate_CP0()
1312 			} else if ((rd == MIPS_CP0_CAUSE) && (sel == 0)) {  in kvm_mips_emulate_CP0()
1327 			} else if ((rd == MIPS_CP0_HWRENA) && (sel == 0)) {  in kvm_mips_emulate_CP0()
1336 				cop0->reg[rd][sel] = vcpu->arch.gprs[rt] & mask;  in kvm_mips_emulate_CP0()
1338 				cop0->reg[rd][sel] = vcpu->arch.gprs[rt];  in kvm_mips_emulate_CP0()
1347 				vcpu->arch.pc, rt, rd, sel);  in kvm_mips_emulate_CP0()
1349 				      KVM_TRACE_COP0(rd, sel),  in kvm_mips_emulate_CP0()
2440 		int sel = inst.r_format.re & 0x7;  in kvm_mips_handle_ri()  local
2478 		trace_kvm_hwr(vcpu, KVM_TRACE_RDHWR, KVM_TRACE_HWR(rd, sel),  in kvm_mips_handle_ri()