Lines Matching refs:rb
179 uint64_t *rb, uint64_t *clob1, uint64_t *clob2, in find_regs() argument
207 *rb = reg; in find_regs()
208 alias_reg_map = (1ULL << *ra) | (1ULL << *rb); in find_regs()
259 *rb = reg; in find_regs()
260 alias_reg_map = (1ULL << *ra) | (1ULL << *rb); in find_regs()
315 static bool check_regs(uint64_t rd, uint64_t ra, uint64_t rb, in check_regs() argument
329 if ((rb >= 56) && (rb != TREG_ZERO)) in check_regs()
393 static tilegx_bundle_bits jit_x0_dblalign(int rd, int ra, int rb) in jit_x0_dblalign() argument
398 create_SrcB_X0(rb); in jit_x0_dblalign()
435 static tilegx_bundle_bits jit_x1_st1_add(int ra, int rb, int imm8) in jit_x1_st1_add() argument
441 create_SrcB_X1(rb) | create_Dest_Imm8_X1(imm8); in jit_x1_st1_add()
445 static tilegx_bundle_bits jit_x1_st(int ra, int rb) in jit_x1_st() argument
449 create_SrcA_X1(ra) | create_SrcB_X1(rb); in jit_x1_st()
453 static tilegx_bundle_bits jit_x1_st_add(int ra, int rb, int imm8) in jit_x1_st_add() argument
459 create_SrcB_X1(rb) | create_Dest_Imm8_X1(imm8); in jit_x1_st_add()
561 uint64_t ra = -1, rb = -1, rd = -1, clob1 = -1, clob2 = -1, clob3 = -1; in jit_bundle_gen() local
642 find_regs(bundle, 0, &ra, &rb, &clob1, &clob2, in jit_bundle_gen()
677 find_regs(bundle, &rd, &ra, &rb, &clob1, &clob2, in jit_bundle_gen()
695 find_regs(bundle, &rd, &ra, &rb, &clob1, in jit_bundle_gen()
722 find_regs(bundle, 0, &ra, &rb, in jit_bundle_gen()
788 &ra, &rb, &clob1, &clob2, &clob3, &alias); in jit_bundle_gen()
796 if (check_regs(rd, ra, rb, clob1, clob2, clob3) == true) in jit_bundle_gen()
933 x = regs->regs[rb]; in jit_bundle_gen()
1017 if ((ra != rb) && (rd != TREG_SP) && !alias && in jit_bundle_gen()
1038 jit_x0_rotli(rb, rb, 56) | in jit_bundle_gen()
1039 jit_x1_st1_add(ra, rb, in jit_bundle_gen()
1052 frag.insn[n] |= jit_x0_rotli(rb, rb, 32); in jit_bundle_gen()
1054 frag.insn[n] |= jit_x0_rotli(rb, rb, 16); in jit_bundle_gen()
1187 jit_x0_rotli(rb, rb, 56) | in jit_bundle_gen()
1188 jit_x1_st1_add(clob1, rb, UA_FIXUP_ADDR_DELTA); in jit_bundle_gen()
1200 jit_x0_rotli(rb, rb, 56) | in jit_bundle_gen()
1201 jit_x1_st1_add(clob1, rb, UA_FIXUP_ADDR_DELTA); in jit_bundle_gen()
1209 frag.insn[n++] = jit_x0_rotli(rb, rb, 32) | in jit_bundle_gen()
1213 jit_x0_addi(clob2, rb, 0) | in jit_bundle_gen()
1217 jit_x0_shrui(rb, rb, 8) | in jit_bundle_gen()
1218 jit_x1_st1_add(clob1, rb, in jit_bundle_gen()
1222 jit_x0_addi(rb, clob2, 0) | in jit_bundle_gen()
1377 (int)rb, (int)bundle_2_enable, in jit_bundle_gen()