33 #define store_cbc_16way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7, t0) \  argument
34 	vpxor t0, t0, t0; \
35 	vinserti128 $1, (src), t0, t0; \
36 	vpxor t0, x0, x0; \
60 #define load_ctr_16way(iv, bswap, x0, x1, x2, x3, x4, x5, x6, x7, t0, t0x, t1, \  argument
62 	vpcmpeqd t0, t0, t0; \
63 	vpsrldq $8, t0, t0; /* ab: -1:0 ; cd: -1:0 */ \
64 	vpaddq t0, t0, t4; /* ab: -2:0 ; cd: -2:0 */\
75 	add2_le128(t2, t0, t4, t3, t5); /* ab: le2 ; cd: le3 */ \
77 	add2_le128(t2, t0, t4, t3, t5); \
79 	add2_le128(t2, t0, t4, t3, t5); \
81 	add2_le128(t2, t0, t4, t3, t5); \
83 	add2_le128(t2, t0, t4, t3, t5); \
85 	add2_le128(t2, t0, t4, t3, t5); \
87 	add2_le128(t2, t0, t4, t3, t5); \
124 		       tivx, t0, t0x, t1, t1x, t2, t2x, t3, \  argument
134 	vinserti128 $1, tivx, t0, tiv; \
139 	gf128mul_x2_ble(tiv, t1, t2, t0, t3); \
143 	gf128mul_x2_ble(tiv, t1, t2, t0, t3); \
147 	gf128mul_x2_ble(tiv, t1, t2, t0, t3); \
151 	gf128mul_x2_ble(tiv, t1, t2, t0, t3); \
155 	gf128mul_x2_ble(tiv, t1, t2, t0, t3); \
159 	gf128mul_x2_ble(tiv, t1, t2, t0, t3); \
163 	gf128mul_x2_ble(tiv, t1, t2, t0, t3); \