20 static u32 bcma_core_pcie2_cfg_read(struct bcma_drv_pcie2 *pcie2, u32 addr)
22 	pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, addr);
23 	pcie2_read32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR);
24 	return pcie2_read32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA);
28 static void bcma_core_pcie2_cfg_write(struct bcma_drv_pcie2 *pcie2, u32 addr,  in bcma_core_pcie2_cfg_write()  argument
31 	pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, addr);  in bcma_core_pcie2_cfg_write()
32 	pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA, val);  in bcma_core_pcie2_cfg_write()
39 static u32 bcma_core_pcie2_war_delay_perst_enab(struct bcma_drv_pcie2 *pcie2,  in bcma_core_pcie2_war_delay_perst_enab()  argument
45 	val = pcie2_read32(pcie2, BCMA_CORE_PCIE2_CLK_CONTROL);  in bcma_core_pcie2_war_delay_perst_enab()
52 	pcie2_write32(pcie2, (BCMA_CORE_PCIE2_CLK_CONTROL), val);  in bcma_core_pcie2_war_delay_perst_enab()
54 	return pcie2_read32(pcie2, BCMA_CORE_PCIE2_CLK_CONTROL);  in bcma_core_pcie2_war_delay_perst_enab()
57 static void bcma_core_pcie2_set_ltr_vals(struct bcma_drv_pcie2 *pcie2)  in bcma_core_pcie2_set_ltr_vals()  argument
60 	pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, 0x844);  in bcma_core_pcie2_set_ltr_vals()
61 	pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA, 0x883c883c);  in bcma_core_pcie2_set_ltr_vals()
63 	pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, 0x848);  in bcma_core_pcie2_set_ltr_vals()
64 	pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA, 0x88648864);  in bcma_core_pcie2_set_ltr_vals()
66 	pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, 0x84C);  in bcma_core_pcie2_set_ltr_vals()
67 	pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA, 0x90039003);  in bcma_core_pcie2_set_ltr_vals()
70 static void bcma_core_pcie2_hw_ltr_war(struct bcma_drv_pcie2 *pcie2)  in bcma_core_pcie2_hw_ltr_war()  argument
72 	u8 core_rev = pcie2->core->id.rev;  in bcma_core_pcie2_hw_ltr_war()
78 	pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR,  in bcma_core_pcie2_hw_ltr_war()
80 	devstsctr2 = pcie2_read32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA);  in bcma_core_pcie2_hw_ltr_war()
83 		bcma_core_pcie2_set_ltr_vals(pcie2);  in bcma_core_pcie2_hw_ltr_war()
90 		pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR,  in bcma_core_pcie2_hw_ltr_war()
92 		pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA, devstsctr2);  in bcma_core_pcie2_hw_ltr_war()
95 		pcie2_write32(pcie2, BCMA_CORE_PCIE2_LTR_STATE,  in bcma_core_pcie2_hw_ltr_war()
100 		pcie2_write32(pcie2, BCMA_CORE_PCIE2_LTR_STATE,  in bcma_core_pcie2_hw_ltr_war()
106 static void pciedev_crwlpciegen2(struct bcma_drv_pcie2 *pcie2)  in pciedev_crwlpciegen2()  argument
108 	u8 core_rev = pcie2->core->id.rev;  in pciedev_crwlpciegen2()
120 	pcie2_set32(pcie2, BCMA_CORE_PCIE2_CLK_CONTROL,  in pciedev_crwlpciegen2()
123 	pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR,  in pciedev_crwlpciegen2()
125 	pcie2_mask32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA,  in pciedev_crwlpciegen2()
131 static void pciedev_crwlpciegen2_180(struct bcma_drv_pcie2 *pcie2)  in pciedev_crwlpciegen2_180()  argument
133 	pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, PCIE2_PMCR_REFUP);  in pciedev_crwlpciegen2_180()
134 	pcie2_set32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA, 0x1f);  in pciedev_crwlpciegen2_180()
137 static void pciedev_crwlpciegen2_182(struct bcma_drv_pcie2 *pcie2)  in pciedev_crwlpciegen2_182()  argument
139 	pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR, PCIE2_SBMBX);  in pciedev_crwlpciegen2_182()
140 	pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA, 1 << 0);  in pciedev_crwlpciegen2_182()
143 static void pciedev_reg_pm_clk_period(struct bcma_drv_pcie2 *pcie2)  in pciedev_reg_pm_clk_period()  argument
145 	struct bcma_drv_cc *drv_cc = &pcie2->core->bus->drv_cc;  in pciedev_reg_pm_clk_period()
146 	u8 core_rev = pcie2->core->id.rev;  in pciedev_reg_pm_clk_period()
152 		pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDADDR,  in pciedev_reg_pm_clk_period()
154 		pcie2_write32(pcie2, BCMA_CORE_PCIE2_CONFIGINDDATA, pm_value);  in pciedev_reg_pm_clk_period()
158 void bcma_core_pcie2_init(struct bcma_drv_pcie2 *pcie2)  in bcma_core_pcie2_init()  argument
160 	struct bcma_bus *bus = pcie2->core->bus;  in bcma_core_pcie2_init()
164 	tmp = pcie2_read32(pcie2, BCMA_CORE_PCIE2_SPROM(54));  in bcma_core_pcie2_init()
166 		bcma_core_pcie2_cfg_write(pcie2, 0x4e0, 0x17);  in bcma_core_pcie2_init()
171 		pcie2->reqsize = 1024;  in bcma_core_pcie2_init()
174 		pcie2->reqsize = 128;  in bcma_core_pcie2_init()
179 		bcma_core_pcie2_war_delay_perst_enab(pcie2, true);  in bcma_core_pcie2_init()
180 	bcma_core_pcie2_hw_ltr_war(pcie2);  in bcma_core_pcie2_init()
181 	pciedev_crwlpciegen2(pcie2);  in bcma_core_pcie2_init()
182 	pciedev_reg_pm_clk_period(pcie2);  in bcma_core_pcie2_init()
183 	pciedev_crwlpciegen2_180(pcie2);  in bcma_core_pcie2_init()
184 	pciedev_crwlpciegen2_182(pcie2);  in bcma_core_pcie2_init()
191 void bcma_core_pcie2_up(struct bcma_drv_pcie2 *pcie2)  in bcma_core_pcie2_up()  argument
193 	struct bcma_bus *bus = pcie2->core->bus;  in bcma_core_pcie2_up()
197 	err = pcie_set_readrq(dev, pcie2->reqsize);  in bcma_core_pcie2_up()