Lines Matching refs:CGU_CLK_DIV
297 "cpu", CGU_CLK_DIV,
303 "l2cache", CGU_CLK_DIV,
309 "ahb0", CGU_CLK_MUX | CGU_CLK_DIV,
324 "ahb2", CGU_CLK_DIV,
330 "pclk", CGU_CLK_DIV,
336 "ddr", CGU_CLK_MUX | CGU_CLK_DIV,
343 "vpu", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
352 "i2s_pll", CGU_CLK_MUX | CGU_CLK_DIV,
365 "lcd0pixclk", CGU_CLK_MUX | CGU_CLK_DIV,
373 "lcd1pixclk", CGU_CLK_MUX | CGU_CLK_DIV,
387 "msc0", CGU_CLK_DIV | CGU_CLK_GATE,
394 "msc1", CGU_CLK_DIV | CGU_CLK_GATE,
401 "msc2", CGU_CLK_DIV | CGU_CLK_GATE,
408 "uhc", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
417 "ssi_pll", CGU_CLK_MUX | CGU_CLK_DIV,
430 "cim_mclk", CGU_CLK_MUX | CGU_CLK_DIV,
437 "pcm_pll", CGU_CLK_MUX | CGU_CLK_DIV,
452 "gpu", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
461 "hdmi", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
470 "bch", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,