Lines Matching refs:CGU_CLK_MUX
283 "sclk_a", CGU_CLK_MUX,
290 "cpumux", CGU_CLK_MUX,
309 "ahb0", CGU_CLK_MUX | CGU_CLK_DIV,
317 "ahb2_apb_mux", CGU_CLK_MUX,
336 "ddr", CGU_CLK_MUX | CGU_CLK_DIV,
343 "vpu", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
352 "i2s_pll", CGU_CLK_MUX | CGU_CLK_DIV,
359 "i2s", CGU_CLK_MUX,
365 "lcd0pixclk", CGU_CLK_MUX | CGU_CLK_DIV,
373 "lcd1pixclk", CGU_CLK_MUX | CGU_CLK_DIV,
381 "msc_mux", CGU_CLK_MUX,
408 "uhc", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
417 "ssi_pll", CGU_CLK_MUX | CGU_CLK_DIV,
424 "ssi", CGU_CLK_MUX,
430 "cim_mclk", CGU_CLK_MUX | CGU_CLK_DIV,
437 "pcm_pll", CGU_CLK_MUX | CGU_CLK_DIV,
445 "pcm", CGU_CLK_MUX | CGU_CLK_GATE,
452 "gpu", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
461 "hdmi", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,
470 "bch", CGU_CLK_MUX | CGU_CLK_DIV | CGU_CLK_GATE,