Lines Matching refs:PNAME
113 PNAME(mux_pll_p) = { "xin24m", "xin32k" };
115 PNAME(mux_armclkl_p) = { "clk_core_l_lpll_src",
119 PNAME(mux_armclkb_p) = { "clk_core_b_lpll_src",
123 PNAME(mux_ddrclk_p) = { "clk_ddrc_lpll_src",
127 PNAME(mux_aclk_cci_p) = { "cpll_aclk_cci_src",
131 PNAME(mux_cci_trace_p) = { "cpll_cci_trace",
133 PNAME(mux_cs_p) = { "cpll_cs", "gpll_cs",
135 PNAME(mux_aclk_perihp_p) = { "cpll_aclk_perihp_src",
138 PNAME(mux_pll_src_cpll_gpll_p) = { "cpll", "gpll" };
139 PNAME(mux_pll_src_cpll_gpll_npll_p) = { "cpll", "gpll", "npll" };
140 PNAME(mux_pll_src_cpll_gpll_ppll_p) = { "cpll", "gpll", "ppll" };
141 PNAME(mux_pll_src_cpll_gpll_upll_p) = { "cpll", "gpll", "upll" };
142 PNAME(mux_pll_src_npll_cpll_gpll_p) = { "npll", "cpll", "gpll" };
143 PNAME(mux_pll_src_cpll_gpll_npll_ppll_p) = { "cpll", "gpll", "npll",
145 PNAME(mux_pll_src_cpll_gpll_npll_24m_p) = { "cpll", "gpll", "npll",
147 PNAME(mux_pll_src_cpll_gpll_npll_usbphy480m_p) = { "cpll", "gpll", "npll",
149 PNAME(mux_pll_src_ppll_cpll_gpll_npll_p) = { "ppll", "cpll", "gpll",
151 PNAME(mux_pll_src_cpll_gpll_npll_upll_24m_p) = { "cpll", "gpll", "npll",
153 PNAME(mux_pll_src_cpll_gpll_npll_ppll_upll_24m_p) = { "cpll", "gpll", "npll",
156 PNAME(mux_pll_src_vpll_cpll_gpll_p) = { "vpll", "cpll", "gpll" };
157 PNAME(mux_pll_src_vpll_cpll_gpll_npll_p) = { "vpll", "cpll", "gpll",
159 PNAME(mux_pll_src_vpll_cpll_gpll_24m_p) = { "vpll", "cpll", "gpll",
162 PNAME(mux_dclk_vop0_p) = { "dclk_vop0_div",
164 PNAME(mux_dclk_vop1_p) = { "dclk_vop1_div",
167 PNAME(mux_clk_cif_p) = { "clk_cifout_src", "xin24m" };
169 PNAME(mux_pll_src_24m_usbphy480m_p) = { "xin24m", "clk_usbphy_480m" };
170 PNAME(mux_pll_src_24m_pciephy_p) = { "xin24m", "clk_pciephy_ref100m" };
171 PNAME(mux_pll_src_24m_32k_cpll_gpll_p) = { "xin24m", "xin32k",
173 PNAME(mux_pciecore_cru_phy_p) = { "clk_pcie_core_cru",
176 PNAME(mux_aclk_emmc_p) = { "cpll_aclk_emmc_src",
179 PNAME(mux_aclk_perilp0_p) = { "cpll_aclk_perilp0_src",
182 PNAME(mux_fclk_cm0s_p) = { "cpll_fclk_cm0s_src",
185 PNAME(mux_hclk_perilp1_p) = { "cpll_hclk_perilp1_src",
188 PNAME(mux_clk_testout1_p) = { "clk_testout1_pll_src", "xin24m" };
189 PNAME(mux_clk_testout2_p) = { "clk_testout2_pll_src", "xin24m" };
191 PNAME(mux_usbphy_480m_p) = { "clk_usbphy0_480m_src",
193 PNAME(mux_aclk_gmac_p) = { "cpll_aclk_gmac_src",
195 PNAME(mux_rmii_p) = { "clk_gmac", "clkin_gmac" };
196 PNAME(mux_spdif_p) = { "clk_spdif_div", "clk_spdif_frac",
198 PNAME(mux_i2s0_p) = { "clk_i2s0_div", "clk_i2s0_frac",
200 PNAME(mux_i2s1_p) = { "clk_i2s1_div", "clk_i2s1_frac",
202 PNAME(mux_i2s2_p) = { "clk_i2s2_div", "clk_i2s2_frac",
204 PNAME(mux_i2sch_p) = { "clk_i2s0", "clk_i2s1",
206 PNAME(mux_i2sout_p) = { "clk_i2sout_src", "xin12m" };
208 PNAME(mux_uart0_p) = { "clk_uart0_div", "clk_uart0_frac", "xin24m" };
209 PNAME(mux_uart1_p) = { "clk_uart1_div", "clk_uart1_frac", "xin24m" };
210 PNAME(mux_uart2_p) = { "clk_uart2_div", "clk_uart2_frac", "xin24m" };
211 PNAME(mux_uart3_p) = { "clk_uart3_div", "clk_uart3_frac", "xin24m" };
214 PNAME(mux_ppll_24m_p) = { "ppll", "xin24m" };
215 PNAME(mux_24m_ppll_p) = { "xin24m", "ppll" };
216 PNAME(mux_fclk_cm0s_pmu_ppll_p) = { "fclk_cm0s_pmu_ppll_src", "xin24m" };
217 PNAME(mux_wifi_pmu_p) = { "clk_wifi_div", "clk_wifi_frac" };
218 PNAME(mux_uart4_pmu_p) = { "clk_uart4_div", "clk_uart4_frac",
220 PNAME(mux_clk_testout2_2io_p) = { "clk_testout2", "clk_32k_suspend_pmu" };