320 	struct dma_device dma_dev[XGENE_DMA_MAX_CHANNEL];  member
1650 			       struct dma_device *dma_dev)  in xgene_dma_set_caps()  argument
1653 	dma_cap_zero(dma_dev->cap_mask);  in xgene_dma_set_caps()
1656 	dma_cap_set(DMA_SG, dma_dev->cap_mask);  in xgene_dma_set_caps()
1669 		dma_cap_set(DMA_PQ, dma_dev->cap_mask);  in xgene_dma_set_caps()
1670 		dma_cap_set(DMA_XOR, dma_dev->cap_mask);  in xgene_dma_set_caps()
1673 		dma_cap_set(DMA_XOR, dma_dev->cap_mask);  in xgene_dma_set_caps()
1677 	dma_dev->dev = chan->dev;  in xgene_dma_set_caps()
1678 	dma_dev->device_alloc_chan_resources = xgene_dma_alloc_chan_resources;  in xgene_dma_set_caps()
1679 	dma_dev->device_free_chan_resources = xgene_dma_free_chan_resources;  in xgene_dma_set_caps()
1680 	dma_dev->device_issue_pending = xgene_dma_issue_pending;  in xgene_dma_set_caps()
1681 	dma_dev->device_tx_status = xgene_dma_tx_status;  in xgene_dma_set_caps()
1682 	dma_dev->device_prep_dma_sg = xgene_dma_prep_sg;  in xgene_dma_set_caps()
1684 	if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {  in xgene_dma_set_caps()
1685 		dma_dev->device_prep_dma_xor = xgene_dma_prep_xor;  in xgene_dma_set_caps()
1686 		dma_dev->max_xor = XGENE_DMA_MAX_XOR_SRC;  in xgene_dma_set_caps()
1687 		dma_dev->xor_align = DMAENGINE_ALIGN_64_BYTES;  in xgene_dma_set_caps()
1690 	if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {  in xgene_dma_set_caps()
1691 		dma_dev->device_prep_dma_pq = xgene_dma_prep_pq;  in xgene_dma_set_caps()
1692 		dma_dev->max_pq = XGENE_DMA_MAX_XOR_SRC;  in xgene_dma_set_caps()
1693 		dma_dev->pq_align = DMAENGINE_ALIGN_64_BYTES;  in xgene_dma_set_caps()
1700 	struct dma_device *dma_dev = &pdma->dma_dev[id];  in xgene_dma_async_register()  local
1703 	chan->dma_chan.device = dma_dev;  in xgene_dma_async_register()
1717 	xgene_dma_set_caps(chan, dma_dev);  in xgene_dma_async_register()
1720 	INIT_LIST_HEAD(&dma_dev->channels);  in xgene_dma_async_register()
1721 	list_add_tail(&chan->dma_chan.device_node, &dma_dev->channels);  in xgene_dma_async_register()
1724 	ret = dma_async_device_register(dma_dev);  in xgene_dma_async_register()
1735 		 dma_has_cap(DMA_SG, dma_dev->cap_mask) ? "SGCPY " : "",  in xgene_dma_async_register()
1736 		 dma_has_cap(DMA_XOR, dma_dev->cap_mask) ? "XOR " : "",  in xgene_dma_async_register()
1737 		 dma_has_cap(DMA_PQ, dma_dev->cap_mask) ? "PQ " : "");  in xgene_dma_async_register()
1750 				dma_async_device_unregister(&pdma->dma_dev[j]);  in xgene_dma_init_async()
1766 		dma_async_device_unregister(&pdma->dma_dev[i]);  in xgene_dma_async_unregister()