Lines Matching refs:gpio
93 static void __iomem *bank_val_reg(struct aspeed_gpio *gpio, in bank_val_reg() argument
97 return gpio->base + bank->val_regs + reg; in bank_val_reg()
100 static void __iomem *bank_irq_reg(struct aspeed_gpio *gpio, in bank_irq_reg() argument
104 return gpio->base + bank->irq_regs + reg; in bank_irq_reg()
109 struct aspeed_gpio *gpio = gpiochip_get_data(gc); in aspeed_gpio_get() local
112 return !!(ioread32(bank_val_reg(gpio, bank, GPIO_DATA)) in aspeed_gpio_get()
119 struct aspeed_gpio *gpio = gpiochip_get_data(gc); in __aspeed_gpio_set() local
124 addr = bank_val_reg(gpio, bank, GPIO_DATA); in __aspeed_gpio_set()
138 struct aspeed_gpio *gpio = gpiochip_get_data(gc); in aspeed_gpio_set() local
141 spin_lock_irqsave(&gpio->lock, flags); in aspeed_gpio_set()
145 spin_unlock_irqrestore(&gpio->lock, flags); in aspeed_gpio_set()
150 struct aspeed_gpio *gpio = gpiochip_get_data(gc); in aspeed_gpio_dir_in() local
155 spin_lock_irqsave(&gpio->lock, flags); in aspeed_gpio_dir_in()
157 reg = ioread32(bank_val_reg(gpio, bank, GPIO_DIR)); in aspeed_gpio_dir_in()
158 iowrite32(reg & ~GPIO_BIT(offset), bank_val_reg(gpio, bank, GPIO_DIR)); in aspeed_gpio_dir_in()
160 spin_unlock_irqrestore(&gpio->lock, flags); in aspeed_gpio_dir_in()
168 struct aspeed_gpio *gpio = gpiochip_get_data(gc); in aspeed_gpio_dir_out() local
173 spin_lock_irqsave(&gpio->lock, flags); in aspeed_gpio_dir_out()
175 reg = ioread32(bank_val_reg(gpio, bank, GPIO_DIR)); in aspeed_gpio_dir_out()
176 iowrite32(reg | GPIO_BIT(offset), bank_val_reg(gpio, bank, GPIO_DIR)); in aspeed_gpio_dir_out()
180 spin_unlock_irqrestore(&gpio->lock, flags); in aspeed_gpio_dir_out()
187 struct aspeed_gpio *gpio = gpiochip_get_data(gc); in aspeed_gpio_get_direction() local
192 spin_lock_irqsave(&gpio->lock, flags); in aspeed_gpio_get_direction()
194 val = ioread32(bank_val_reg(gpio, bank, GPIO_DIR)) & GPIO_BIT(offset); in aspeed_gpio_get_direction()
196 spin_unlock_irqrestore(&gpio->lock, flags); in aspeed_gpio_get_direction()
203 struct aspeed_gpio **gpio, in irqd_to_aspeed_gpio_data() argument
211 *gpio = irq_data_get_irq_chip_data(d); in irqd_to_aspeed_gpio_data()
221 struct aspeed_gpio *gpio; in aspeed_gpio_irq_ack() local
227 rc = irqd_to_aspeed_gpio_data(d, &gpio, &bank, &bit); in aspeed_gpio_irq_ack()
231 status_addr = bank_irq_reg(gpio, bank, GPIO_IRQ_STATUS); in aspeed_gpio_irq_ack()
233 spin_lock_irqsave(&gpio->lock, flags); in aspeed_gpio_irq_ack()
235 spin_unlock_irqrestore(&gpio->lock, flags); in aspeed_gpio_irq_ack()
241 struct aspeed_gpio *gpio; in aspeed_gpio_irq_set_mask() local
247 rc = irqd_to_aspeed_gpio_data(d, &gpio, &bank, &bit); in aspeed_gpio_irq_set_mask()
251 addr = bank_irq_reg(gpio, bank, GPIO_IRQ_ENABLE); in aspeed_gpio_irq_set_mask()
253 spin_lock_irqsave(&gpio->lock, flags); in aspeed_gpio_irq_set_mask()
262 spin_unlock_irqrestore(&gpio->lock, flags); in aspeed_gpio_irq_set_mask()
283 struct aspeed_gpio *gpio; in aspeed_gpio_set_type() local
288 rc = irqd_to_aspeed_gpio_data(d, &gpio, &bank, &bit); in aspeed_gpio_set_type()
310 spin_lock_irqsave(&gpio->lock, flags); in aspeed_gpio_set_type()
312 addr = bank_irq_reg(gpio, bank, GPIO_IRQ_TYPE0); in aspeed_gpio_set_type()
317 addr = bank_irq_reg(gpio, bank, GPIO_IRQ_TYPE1); in aspeed_gpio_set_type()
322 addr = bank_irq_reg(gpio, bank, GPIO_IRQ_TYPE2); in aspeed_gpio_set_type()
327 spin_unlock_irqrestore(&gpio->lock, flags); in aspeed_gpio_set_type()
367 static int aspeed_gpio_setup_irqs(struct aspeed_gpio *gpio, in aspeed_gpio_setup_irqs() argument
376 gpio->irq = rc; in aspeed_gpio_setup_irqs()
378 rc = gpiochip_irqchip_add(&gpio->chip, &aspeed_gpio_irqchip, in aspeed_gpio_setup_irqs()
385 gpiochip_set_chained_irqchip(&gpio->chip, &aspeed_gpio_irqchip, in aspeed_gpio_setup_irqs()
386 gpio->irq, aspeed_gpio_irq_handler); in aspeed_gpio_setup_irqs()
403 struct aspeed_gpio *gpio; in aspeed_gpio_probe() local
407 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); in aspeed_gpio_probe()
408 if (!gpio) in aspeed_gpio_probe()
412 gpio->base = devm_ioremap_resource(&pdev->dev, res); in aspeed_gpio_probe()
413 if (IS_ERR(gpio->base)) in aspeed_gpio_probe()
414 return PTR_ERR(gpio->base); in aspeed_gpio_probe()
416 spin_lock_init(&gpio->lock); in aspeed_gpio_probe()
418 gpio->chip.ngpio = ARRAY_SIZE(aspeed_gpio_banks) * 32; in aspeed_gpio_probe()
420 gpio->chip.parent = &pdev->dev; in aspeed_gpio_probe()
421 gpio->chip.direction_input = aspeed_gpio_dir_in; in aspeed_gpio_probe()
422 gpio->chip.direction_output = aspeed_gpio_dir_out; in aspeed_gpio_probe()
423 gpio->chip.get_direction = aspeed_gpio_get_direction; in aspeed_gpio_probe()
424 gpio->chip.request = aspeed_gpio_request; in aspeed_gpio_probe()
425 gpio->chip.free = aspeed_gpio_free; in aspeed_gpio_probe()
426 gpio->chip.get = aspeed_gpio_get; in aspeed_gpio_probe()
427 gpio->chip.set = aspeed_gpio_set; in aspeed_gpio_probe()
428 gpio->chip.label = dev_name(&pdev->dev); in aspeed_gpio_probe()
429 gpio->chip.base = -1; in aspeed_gpio_probe()
431 rc = devm_gpiochip_add_data(&pdev->dev, &gpio->chip, gpio); in aspeed_gpio_probe()
435 return aspeed_gpio_setup_irqs(gpio, pdev); in aspeed_gpio_probe()